diff options
| author | Craig Topper <craig.topper@intel.com> | 2018-12-31 19:09:27 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-12-31 19:09:27 +0000 |
| commit | bb0873cf4687355a1bfbff2312c3ac03434555d6 (patch) | |
| tree | f1d5970d86287bc3d90c38187ced717cd2c0a496 /llvm/lib | |
| parent | 05f484ff55aa39019f42cc4ea6b056f3477728ca (diff) | |
| download | bcm5719-llvm-bb0873cf4687355a1bfbff2312c3ac03434555d6.tar.gz bcm5719-llvm-bb0873cf4687355a1bfbff2312c3ac03434555d6.zip | |
[X86] Add X86ISD::VSRAI to computeKnownBitsForTargetNode.
Differential Revision: https://reviews.llvm.org/D56169
llvm-svn: 350178
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index ddefe05667f..2ea698d6191 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -30001,6 +30001,7 @@ void X86TargetLowering::computeKnownBitsForTargetNode(const SDValue Op, Known.Zero.setBitsFrom(SrcVT.getScalarSizeInBits()); break; } + case X86ISD::VSRAI: case X86ISD::VSHLI: case X86ISD::VSRLI: { if (auto *ShiftImm = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { @@ -30016,11 +30017,14 @@ void X86TargetLowering::computeKnownBitsForTargetNode(const SDValue Op, Known.One <<= ShAmt; // Low bits are known zero. Known.Zero.setLowBits(ShAmt); - } else { + } else if (Opc == X86ISD::VSRLI) { Known.Zero.lshrInPlace(ShAmt); Known.One.lshrInPlace(ShAmt); // High bits are known zero. Known.Zero.setHighBits(ShAmt); + } else { + Known.Zero.ashrInPlace(ShAmt); + Known.One.ashrInPlace(ShAmt); } } break; |

