diff options
| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-04-28 18:45:16 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-04-28 18:45:16 +0000 |
| commit | badf63e95ce1f7e171d68ce984cfc421f4e00750 (patch) | |
| tree | f7a04c05106513cfad54a97e038bdbc36241e196 /llvm/lib | |
| parent | 5eb9f581b664e0e35c6bf6db4f696f57a8516523 (diff) | |
| download | bcm5719-llvm-badf63e95ce1f7e171d68ce984cfc421f4e00750.tar.gz bcm5719-llvm-badf63e95ce1f7e171d68ce984cfc421f4e00750.zip | |
[X86] Remove unnecessary rotate-carry folded InstRW overrides.
Merge some remaining instregex entries.
llvm-svn: 331116
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ScheduleZnver1.td | 19 |
1 files changed, 2 insertions, 17 deletions
diff --git a/llvm/lib/Target/X86/X86ScheduleZnver1.td b/llvm/lib/Target/X86/X86ScheduleZnver1.td index 209fba85148..e5dfb9c8f35 100644 --- a/llvm/lib/Target/X86/X86ScheduleZnver1.td +++ b/llvm/lib/Target/X86/X86ScheduleZnver1.td @@ -601,21 +601,9 @@ def : InstRW<[WriteMicrocoded], (instregex "PDEP(32|64)rr", "PEXT(32|64)rr")>; // r,r,m. def : InstRW<[WriteMicrocoded], (instregex "PDEP(32|64)rm", "PEXT(32|64)rm")>; -// ROR ROL. -def : InstRW<[WriteShift], (instregex "RO(R|L)(8|16|32|64)r1")>; - // RCR RCL. -// r,1. -def : InstRW<[WriteShift], (instregex "RC(R|L)(8|16|32|64)r1")>; - -// m,1. -def : InstRW<[WriteMicrocoded], (instregex "RC(R|L)(8|16|32|64)m1")>; - -// i. -def : InstRW<[WriteShift], (instregex "RC(R|L)(8|16|32|64)r(i|CL)")>; - // m,i. -def : InstRW<[WriteMicrocoded], (instregex "RC(R|L)(8|16|32|64)m(i|CL)")>; +def : InstRW<[WriteMicrocoded], (instregex "RC(R|L)(8|16|32|64)m(1|i|CL)")>; // SHR SHL SAR. // m,i. @@ -626,10 +614,7 @@ def : InstRW<[WriteShiftLd], (instregex "S(A|H)(R|L)(8|16|32|64)m(i|1)")>; def : InstRW<[WriteShiftLd], (instregex "SH(R|L)D(16|32|64)mri8")>; // r,r,cl. -def : InstRW<[WriteMicrocoded], (instregex "SHLD(16|32|64)rrCL")>; - -// r,r,cl. -def : InstRW<[WriteMicrocoded], (instregex "SHRD(16|32|64)rrCL")>; +def : InstRW<[WriteMicrocoded], (instregex "SH(R|L)D(16|32|64)rrCL")>; // m,r,cl. def : InstRW<[WriteMicrocoded], (instregex "SH(R|L)D(16|32|64)mrCL")>; |
