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authorJakob Stoklund Olesen <stoklund@2pi.dk>2010-06-18 16:49:33 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2010-06-18 16:49:33 +0000
commitb9f91667e1ca22e27ac7eb0274ea1e77f967284c (patch)
treeccaa70dded07f23028aa6655e750cbc8df9333c4 /llvm/lib
parent6cf1b791dd425152f1062cca190a3523ef3280ae (diff)
downloadbcm5719-llvm-b9f91667e1ca22e27ac7eb0274ea1e77f967284c.tar.gz
bcm5719-llvm-b9f91667e1ca22e27ac7eb0274ea1e77f967284c.zip
Treat the ARM inline asm {cc} constraint as a physreg (%CPSR), just like X86
does for {flags}. If we create virtual registers of the CCR class, RegAllocFast may try to spill them, and we can't do that. llvm-svn: 106289
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 2d963fa9703..5ec995f771c 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -4945,7 +4945,7 @@ ARMTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
}
}
if (StringRef("{cc}").equals_lower(Constraint))
- return std::make_pair(0U, ARM::CCRRegisterClass);
+ return std::make_pair(unsigned(ARM::CPSR), ARM::CCRRegisterClass);
return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT);
}
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