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| author | Tim Northover <tnorthover@apple.com> | 2015-01-21 15:43:31 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2015-01-21 15:43:31 +0000 |
| commit | b9184f2b1a526c2dafdc1b360c51bb276b757d8e (patch) | |
| tree | 49d4e15cbc146cb102da645ff4d69d4f684d1aab /llvm/lib | |
| parent | 85cd2791c9f478fb8b0150185e5c2cf617a46f25 (diff) | |
| download | bcm5719-llvm-b9184f2b1a526c2dafdc1b360c51bb276b757d8e.tar.gz bcm5719-llvm-b9184f2b1a526c2dafdc1b360c51bb276b757d8e.zip | |
AArch64: add backend option to reserve x18 (platform register)
AAPCS64 says that it's up to the platform to specify whether x18 is
reserved, and a first step on that way is to add a flag controlling
it.
From: Andrew Turner <andrew@fubar.geek.nz>
llvm-svn: 226664
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp b/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp index 6a49af8fc38..206cdbbe0c5 100644 --- a/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp @@ -33,6 +33,10 @@ using namespace llvm; #define GET_REGINFO_TARGET_DESC #include "AArch64GenRegisterInfo.inc" +static cl::opt<bool> +ReserveX18("aarch64-reserve-x18", cl::Hidden, + cl::desc("Reserve X18, making it unavailable as GPR")); + AArch64RegisterInfo::AArch64RegisterInfo(const AArch64InstrInfo *tii, const AArch64Subtarget *sti) : AArch64GenRegisterInfo(AArch64::LR), TII(tii), STI(sti) {} @@ -98,7 +102,7 @@ AArch64RegisterInfo::getReservedRegs(const MachineFunction &MF) const { Reserved.set(AArch64::W29); } - if (STI->isTargetDarwin()) { + if (STI->isTargetDarwin() || ReserveX18) { Reserved.set(AArch64::X18); // Platform register Reserved.set(AArch64::W18); } @@ -125,7 +129,7 @@ bool AArch64RegisterInfo::isReservedReg(const MachineFunction &MF, return true; case AArch64::X18: case AArch64::W18: - return STI->isTargetDarwin(); + return STI->isTargetDarwin() || ReserveX18; case AArch64::FP: case AArch64::W29: return TFI->hasFP(MF) || STI->isTargetDarwin(); @@ -387,7 +391,7 @@ unsigned AArch64RegisterInfo::getRegPressureLimit(const TargetRegisterClass *RC, case AArch64::GPR64commonRegClassID: return 32 - 1 // XZR/SP - (TFI->hasFP(MF) || STI->isTargetDarwin()) // FP - - STI->isTargetDarwin() // X18 reserved as platform register + - (STI->isTargetDarwin() || ReserveX18) // X18 reserved as platform register - hasBasePointer(MF); // X19 case AArch64::FPR8RegClassID: case AArch64::FPR16RegClassID: |
