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| author | Dan Gohman <gohman@apple.com> | 2010-03-04 19:58:08 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2010-03-04 19:58:08 +0000 |
| commit | b8ebd408da2246a5e6f00b39bb556b802c2e1c9a (patch) | |
| tree | d0ba6e2666e0650a5ec8eb64af9ab743a595a63b /llvm/lib | |
| parent | 795667b4241cecc79d25c2c6af9e18399e1f1d2d (diff) | |
| download | bcm5719-llvm-b8ebd408da2246a5e6f00b39bb556b802c2e1c9a.tar.gz bcm5719-llvm-b8ebd408da2246a5e6f00b39bb556b802c2e1c9a.zip | |
Fix recognition of 16-bit bswap for C front-ends which emit the
clobber registers in a different order.
llvm-svn: 97741
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index e2b81930aec..7ca6f70d139 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -9838,11 +9838,20 @@ bool X86TargetLowering::ExpandInlineAsm(CallInst *CI) const { // rorw $$8, ${0:w} --> llvm.bswap.i16 if (CI->getType()->isIntegerTy(16) && AsmPieces.size() == 3 && - AsmPieces[0] == "rorw" && + (AsmPieces[0] == "rorw" || AsmPieces[0] == "rolw") && AsmPieces[1] == "$$8," && AsmPieces[2] == "${0:w}" && - IA->getConstraintString() == "=r,0,~{dirflag},~{fpsr},~{flags},~{cc}") { - return LowerToBSwap(CI); + IA->getConstraintString().compare(0, 5, "=r,0,") == 0) { + AsmPieces.clear(); + SplitString(IA->getConstraintString().substr(5), AsmPieces, ","); + std::sort(AsmPieces.begin(), AsmPieces.end()); + if (AsmPieces.size() == 4 && + AsmPieces[0] == "~{cc}" && + AsmPieces[1] == "~{dirflag}" && + AsmPieces[2] == "~{flags}" && + AsmPieces[3] == "~{fpsr}") { + return LowerToBSwap(CI); + } } break; case 3: |
