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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-05-10 17:42:26 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-05-10 17:42:26 +0000 |
| commit | b7f274ef166ef021b1a590c669dec2f745922b27 (patch) | |
| tree | d306dc892f16d29623e9bbba74d8124b95789eef /llvm/lib | |
| parent | b210c64b281baad0ac705d62e6c298a1629449eb (diff) | |
| download | bcm5719-llvm-b7f274ef166ef021b1a590c669dec2f745922b27.tar.gz bcm5719-llvm-b7f274ef166ef021b1a590c669dec2f745922b27.zip | |
[X86][Znver1] Remove unnecessary SchedWritePMULLD InstRW overrides.
llvm-svn: 332006
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ScheduleZnver1.td | 19 |
1 files changed, 2 insertions, 17 deletions
diff --git a/llvm/lib/Target/X86/X86ScheduleZnver1.td b/llvm/lib/Target/X86/X86ScheduleZnver1.td index 6f2448fe01c..3d068da9048 100644 --- a/llvm/lib/Target/X86/X86ScheduleZnver1.td +++ b/llvm/lib/Target/X86/X86ScheduleZnver1.td @@ -291,8 +291,8 @@ defm : ZnWriteResFpuPair<WriteVecALUY, [ZnFPU], 1>; defm : ZnWriteResFpuPair<WriteVecIMul, [ZnFPU0], 4>; defm : ZnWriteResFpuPair<WriteVecIMulX, [ZnFPU0], 4>; defm : ZnWriteResFpuPair<WriteVecIMulY, [ZnFPU0], 4>; -defm : ZnWriteResFpuPair<WritePMULLD, [ZnFPU0], 4>; // FIXME -defm : ZnWriteResFpuPair<WritePMULLDY, [ZnFPU0], 5, [2]>; // FIXME +defm : ZnWriteResFpuPair<WritePMULLD, [ZnFPU0], 4, [1], 1, 7, 1>; // FIXME +defm : ZnWriteResFpuPair<WritePMULLDY, [ZnFPU0], 5, [2], 1, 7, 1>; // FIXME defm : ZnWriteResFpuPair<WriteShuffle, [ZnFPU], 1>; defm : ZnWriteResFpuPair<WriteShuffleX, [ZnFPU], 1>; defm : ZnWriteResFpuPair<WriteShuffleY, [ZnFPU], 1>; @@ -1073,21 +1073,6 @@ def ZnWritePCMPGTQYm : SchedWriteRes<[ZnAGU, ZnFPU03]> { def : InstRW<[ZnWritePCMPGTQm], (instregex "(V?)PCMPGTQrm")>; def : InstRW<[ZnWritePCMPGTQYm], (instregex "(V?)PCMPGTQYrm")>; -// PMULLD. -// x,m. -def ZnWritePMULLDm : SchedWriteRes<[ZnAGU, ZnFPU0]> { - let Latency = 11; - let NumMicroOps = 2; -} -// y,m. -def ZnWritePMULLDYm : SchedWriteRes<[ZnAGU, ZnFPU0]> { - let Latency = 12; - let NumMicroOps = 2; - let ResourceCycles = [1, 2]; -} -def : InstRW<[ZnWritePMULLDm], (instregex "(V?)PMULLDrm")>; -def : InstRW<[ZnWritePMULLDYm], (instregex "(V?)PMULLDYrm")>; - //-- Logic instructions --// // PSLL,PSRL,PSRA W/D/Q. |
