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authorTim Northover <tnorthover@apple.com>2014-04-14 12:51:06 +0000
committerTim Northover <tnorthover@apple.com>2014-04-14 12:51:06 +0000
commitb6abe806c71ab7d5e265e2301d25ac5ab3914922 (patch)
treeadb12317b97c2f8ce94a5e753b4f6f56c81d3665 /llvm/lib
parent0d7bd4f4443b9f97889141007be208159346f847 (diff)
downloadbcm5719-llvm-b6abe806c71ab7d5e265e2301d25ac5ab3914922.tar.gz
bcm5719-llvm-b6abe806c71ab7d5e265e2301d25ac5ab3914922.zip
AArch64/ARM64: enable directcond.ll test on ARM64.
Code change is because optimizeCompareInstr didn't know how to pull the condition code out of FCSEL instructions. llvm-svn: 206171
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/ARM64/ARM64InstrInfo.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM64/ARM64InstrInfo.cpp b/llvm/lib/Target/ARM64/ARM64InstrInfo.cpp
index cc3310f9176..55b8d5000e9 100644
--- a/llvm/lib/Target/ARM64/ARM64InstrInfo.cpp
+++ b/llvm/lib/Target/ARM64/ARM64InstrInfo.cpp
@@ -775,6 +775,8 @@ bool ARM64InstrInfo::optimizeCompareInstr(
case ARM64::CSELXr:
case ARM64::CSNEGWr:
case ARM64::CSNEGXr:
+ case ARM64::FCSELSrrr:
+ case ARM64::FCSELDrrr:
CC = (ARM64CC::CondCode)Instr.getOperand(IO - 1).getImm();
break;
}
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