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| author | Jan Vesely <jan.vesely@rutgers.edu> | 2016-07-25 20:17:02 +0000 |
|---|---|---|
| committer | Jan Vesely <jan.vesely@rutgers.edu> | 2016-07-25 20:17:02 +0000 |
| commit | b64c8925e918a492ab674423e8832b9aba06a024 (patch) | |
| tree | 66353f2e2c9edd474df0514646c1a32116b41757 /llvm/lib | |
| parent | 7cddfed7e864185e6a93c7f45ac874cd239d2b7a (diff) | |
| download | bcm5719-llvm-b64c8925e918a492ab674423e8832b9aba06a024.tar.gz bcm5719-llvm-b64c8925e918a492ab674423e8832b9aba06a024.zip | |
AMDGPU: Remove read_workdim intrinsic
Differential revision: https://reviews.llvm.org/D22732
llvm-svn: 276682
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUIntrinsics.td | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | 6 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 5 |
3 files changed, 0 insertions, 14 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUIntrinsics.td b/llvm/lib/Target/AMDGPU/AMDGPUIntrinsics.td index 7017d6630cf..ceae0b57539 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUIntrinsics.td +++ b/llvm/lib/Target/AMDGPU/AMDGPUIntrinsics.td @@ -31,9 +31,6 @@ let TargetPrefix = "AMDGPU", isTarget = 1 in { def int_AMDGPU_rsq : Intrinsic< [llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem] >; - - // Deprecated in favor of llvm.amdgcn.read.workdim - def int_AMDGPU_read_workdim : Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>; } include "SIIntrinsics.td" diff --git a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp index f9ceb8e1407..62c02d0e990 100644 --- a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp @@ -747,12 +747,6 @@ SDValue R600TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const case Intrinsic::r600_read_local_size_z: return LowerImplicitParameter(DAG, VT, DL, 8); - case Intrinsic::r600_read_workdim: - case AMDGPUIntrinsic::AMDGPU_read_workdim: { // Legacy name. - uint32_t ByteOffset = getImplicitParameterOffset(MFI, GRID_DIM); - return LowerImplicitParameter(DAG, VT, DL, ByteOffset / 4); - } - case Intrinsic::r600_read_tgid_x: return CreateLiveInRegister(DAG, &AMDGPU::R600_TReg32RegClass, AMDGPU::T1_X, VT); diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp index 55f1cab3329..323525f2151 100644 --- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp @@ -2064,11 +2064,6 @@ SDValue SITargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, return lowerImplicitZextParam(DAG, Op, MVT::i16, SI::KernelInputOffsets::LOCAL_SIZE_Z); - case Intrinsic::amdgcn_read_workdim: - case AMDGPUIntrinsic::AMDGPU_read_workdim: // Legacy name. - // Really only 2 bits. - return lowerImplicitZextParam(DAG, Op, MVT::i8, - getImplicitParameterOffset(MFI, GRID_DIM)); case Intrinsic::amdgcn_workgroup_id_x: case Intrinsic::r600_read_tgid_x: return CreateLiveInRegister(DAG, &AMDGPU::SReg_32RegClass, |
