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| author | Nadav Rotem <nrotem@apple.com> | 2013-02-24 07:09:35 +0000 |
|---|---|---|
| committer | Nadav Rotem <nrotem@apple.com> | 2013-02-24 07:09:35 +0000 |
| commit | b532fca92c7c6e277e0e3c32275f307ab99b35a1 (patch) | |
| tree | f34bae6e1cab98c5d604fc11b5eb1e7b9e28b7f0 /llvm/lib | |
| parent | e2bead7a2da7fffe56cf126ca86e06b19386adf4 (diff) | |
| download | bcm5719-llvm-b532fca92c7c6e277e0e3c32275f307ab99b35a1.tar.gz bcm5719-llvm-b532fca92c7c6e277e0e3c32275f307ab99b35a1.zip | |
Revert r169638 because it broke Mesa llvmpipe tests.
Fix PR15239.
llvm-svn: 175985
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 2315ac7f23f..1543e23a46f 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -16248,11 +16248,6 @@ static SDValue PerformOrCombine(SDNode *N, SelectionDAG &DAG, DebugLoc DL = N->getDebugLoc(); - // We are going to replace the AND, OR, NAND with either BLEND - // or PSIGN, which only look at the MSB. The VSRAI instruction - // does not affect the highest bit, so we can get rid of it. - Mask = Mask.getOperand(0); - // Now we know we at least have a plendvb with the mask val. See if // we can form a psignb/w/d. // psign = x.type == y.type == mask.type && y = sub(0, x); @@ -16261,7 +16256,7 @@ static SDValue PerformOrCombine(SDNode *N, SelectionDAG &DAG, X.getValueType() == MaskVT && Y.getValueType() == MaskVT) { assert((EltBits == 8 || EltBits == 16 || EltBits == 32) && "Unsupported VT for PSIGN"); - Mask = DAG.getNode(X86ISD::PSIGN, DL, MaskVT, X, Mask); + Mask = DAG.getNode(X86ISD::PSIGN, DL, MaskVT, X, Mask.getOperand(0)); return DAG.getNode(ISD::BITCAST, DL, VT, Mask); } // PBLENDVB only available on SSE 4.1 |

