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authorUlrich Weigand <ulrich.weigand@de.ibm.com>2020-01-09 19:03:16 +0100
committerUlrich Weigand <ulrich.weigand@de.ibm.com>2020-01-09 19:06:22 +0100
commitb51fa8670f3d9346cad068aa7300d63eb051069d (patch)
tree9f111ee80c6ba0ba882b909cf173ff25dd526961 /llvm/lib
parent7bbd4076c1984165568c978ff15b77dbfe52b6f0 (diff)
downloadbcm5719-llvm-b51fa8670f3d9346cad068aa7300d63eb051069d.tar.gz
bcm5719-llvm-b51fa8670f3d9346cad068aa7300d63eb051069d.zip
[SystemZ] Fix matching another pattern for nxgrk (PR44496)
SystemZDAGToDAGISel::Select will attempt to split logical instruction with a large immediate constant. This must not happen if the result matches one of the z15 combined operations, so the code checks for those. However, one of them was missed, causing invalid code to be generated in the test case for PR44496.
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp b/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
index 74d66516321..3927a977e6f 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
@@ -1497,8 +1497,9 @@ void SystemZDAGToDAGISel::Select(SDNode *Node) {
if (ChildOpcode == ISD::AND || ChildOpcode == ISD::OR ||
ChildOpcode == ISD::XOR)
break;
- // Check whether this expression matches OR-with-complement.
- if (Opcode == ISD::OR && ChildOpcode == ISD::XOR) {
+ // Check whether this expression matches OR-with-complement
+ // (or matches an alternate pattern for NXOR).
+ if (ChildOpcode == ISD::XOR) {
auto Op0 = Node->getOperand(0);
if (auto *Op0Op1 = dyn_cast<ConstantSDNode>(Op0->getOperand(1)))
if (Op0Op1->getZExtValue() == (uint64_t)-1)
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