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authorTom Stellard <thomas.stellard@amd.com>2016-11-12 00:19:11 +0000
committerTom Stellard <thomas.stellard@amd.com>2016-11-12 00:19:11 +0000
commitb4c8e8e30bc645367fbe60ab48f833199cc216a3 (patch)
tree0127abdd0318f2205cecd9f3d8d0c64f7b614819 /llvm/lib
parent2f94a7a1fa7083ea9487d2aa2d1ef8eb2f33ab0a (diff)
downloadbcm5719-llvm-b4c8e8e30bc645367fbe60ab48f833199cc216a3.tar.gz
bcm5719-llvm-b4c8e8e30bc645367fbe60ab48f833199cc216a3.zip
AMDGPU/SI: Promote i16 = fp_[us]int f32 for VI
Summary: This fixes a regression caused by r286464. Reviewers: arsenm Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, llvm-commits, tony-tye Differential Revision: https://reviews.llvm.org/D26570 llvm-svn: 286687
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/AMDGPU/SIISelLowering.cpp6
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index ac13bd2b07e..6957510c054 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -271,6 +271,12 @@ SITargetLowering::SITargetLowering(const TargetMachine &TM,
AddPromotedToType(ISD::FP16_TO_FP, MVT::i16, MVT::i32);
setOperationAction(ISD::FP_TO_FP16, MVT::i16, Promote);
AddPromotedToType(ISD::FP_TO_FP16, MVT::i16, MVT::i32);
+
+ setOperationAction(ISD::FP_TO_SINT, MVT::i16, Promote);
+ AddPromotedToType(ISD::FP_TO_SINT, MVT::i16, MVT::i32);
+
+ setOperationAction(ISD::FP_TO_UINT, MVT::i16, Promote);
+ AddPromotedToType(ISD::FP_TO_UINT, MVT::i16, MVT::i32);
}
setTargetDAGCombine(ISD::FADD);
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