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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-03-02 12:23:00 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-03-02 12:23:00 +0000 |
| commit | b46c191c4979bde12a11c8f087a874e810a625b7 (patch) | |
| tree | f1163a1ce174e469c9b94117df101b54a6c817f7 /llvm/lib | |
| parent | aba98fc92e9c2f915a2c7a54934126628d1bf6a9 (diff) | |
| download | bcm5719-llvm-b46c191c4979bde12a11c8f087a874e810a625b7.tar.gz bcm5719-llvm-b46c191c4979bde12a11c8f087a874e810a625b7.zip | |
AMDGPU/GlobalISel: Define instruction mapping for @llvm.maxnum
Patch by Tom Stellard
llvm-svn: 326567
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp index 8236242f900..0ef6777488c 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp @@ -359,6 +359,7 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const { switch(MI.getOperand(1).getIntrinsicID()) { default: return getInvalidInstructionMapping(); + case Intrinsic::maxnum: case Intrinsic::amdgcn_cvt_pkrtz: return getDefaultMappingVOP(MI); } |
