[X86][BdVer2] Fix loads/stores throughput for Piledriver (PR39465)

There are two AGU units, and per 1cy, there can be either two loads,
or a load and a store; but not two stores, or two loads and a store.

Additionally, loads shouldn't affect the store scheduler and vice versa.
(but *should* affect the PdEX scheduler.)

Required rL346545.
Fixes https://bugs.llvm.org/show_bug.cgi?id=39465

llvm-svn: 346587

1 files changed, 4 insertions, 4 deletions

diff --git a/llvm/lib/Target/X86/X86ScheduleBdVer2.td b/llvm/lib/Target/X86/X86ScheduleBdVer2.td
index bc5d112c2f4..1a066b30f89 100644
--- a/llvm/lib/Target/X86/X86ScheduleBdVer2.td
+++ b/llvm/lib/Target/X86/X86ScheduleBdVer2.td
@@ -130,14 +130,14 @@ def PdFPU : ProcResGroup<[PdFPU0, PdFPU1, PdFPU2, PdFPU3]> {
 // Load-Store Units
 //
 
-// FIXME: does this even make sense?
-
-def PdLoad  : ProcResGroup<[PdAGLU01]> {
+let Super = PdAGLU01 in
+def PdLoad  : ProcResource<2> {
   // For Piledriver, the load queue is 40 entries deep.
   let BufferSize = 40;
 }
 
-def PdStore : ProcResGroup<[PdAGLU01]> {
+let Super = PdAGLU01 in
+def PdStore : ProcResource<1> {
   // For Piledriver, the store queue is 24 entries deep.
   let BufferSize = 24;
 }