MC: First cut at MCFixup, for getting fixup/relocation information out of an MCCodeEmitter.

llvm-svn: 95708

4 files changed, 46 insertions, 5 deletions

diff --git a/llvm/lib/MC/MCAsmStreamer.cpp b/llvm/lib/MC/MCAsmStreamer.cpp
index d2e48583e02..f3c636c6a53 100644
--- a/llvm/lib/MC/MCAsmStreamer.cpp
+++ b/llvm/lib/MC/MCAsmStreamer.cpp
@@ -535,8 +535,9 @@ void MCAsmStreamer::EmitInstruction(const MCInst &Inst) {
   // Show the encoding in a comment if we have a code emitter.
   if (Emitter) {
     SmallString<256> Code;
+    SmallVector<MCFixup, 4> Fixups;
     raw_svector_ostream VecOS(Code);
-    Emitter->EncodeInstruction(Inst, VecOS);
+    Emitter->EncodeInstruction(Inst, VecOS, Fixups);
     VecOS.flush();
 
     raw_ostream &OS = GetCommentOS();
diff --git a/llvm/lib/MC/MCMachOStreamer.cpp b/llvm/lib/MC/MCMachOStreamer.cpp
index 40a21ad5dd2..99a819f7190 100644
--- a/llvm/lib/MC/MCMachOStreamer.cpp
+++ b/llvm/lib/MC/MCMachOStreamer.cpp
@@ -366,9 +366,10 @@ void MCMachOStreamer::EmitInstruction(const MCInst &Inst) {
   CurSectionData->setHasInstructions(true);
 
   // FIXME: Relocations!
+  SmallVector<MCFixup, 4> Fixups;
   SmallString<256> Code;
   raw_svector_ostream VecOS(Code);
-  Emitter->EncodeInstruction(Inst, VecOS);
+  Emitter->EncodeInstruction(Inst, VecOS, Fixups);
   EmitBytes(VecOS.str(), 0);
 }
 
diff --git a/llvm/lib/Target/X86/X86CodeEmitter.cpp b/llvm/lib/Target/X86/X86CodeEmitter.cpp
index 0cfb0cbb0b3..7ee22230b72 100644
--- a/llvm/lib/Target/X86/X86CodeEmitter.cpp
+++ b/llvm/lib/Target/X86/X86CodeEmitter.cpp
@@ -944,6 +944,24 @@ public:
     delete DummyF;
   }
 
+  unsigned getNumFixupKinds() const {
+    return 5;
+  }
+
+  MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
+    static MCFixupKindInfo Infos[] = {
+      { "reloc_pcrel_word", 0, 4 * 8 },
+      { "reloc_picrel_word", 0, 4 * 8 },
+      { "reloc_absolute_word", 0, 4 * 8 },
+      { "reloc_absolute_word_sext", 0, 4 * 8 },
+      { "reloc_absolute_dword", 0, 8 * 8 }
+    };
+
+    assert(Kind >= FirstTargetFixupKind && Kind < MaxTargetFixupKind &&
+           "Invalid kind!");
+    return Infos[Kind - FirstTargetFixupKind];
+  }
+
   bool AddRegToInstr(const MCInst &MI, MachineInstr *Instr,
                      unsigned Start) const {
     if (Start + 1 > MI.getNumOperands())
@@ -997,7 +1015,8 @@ public:
             AddRegToInstr(MI, Instr, Start + 4));
   }
 
-  void EncodeInstruction(const MCInst &MI, raw_ostream &OS) const {
+  void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+                         SmallVectorImpl<MCFixup> &Fixups) const {
     // Don't look yet!
 
     // Convert the MCInst to a MachineInstr so we can (ab)use the regular
diff --git a/llvm/lib/Target/X86/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/X86MCCodeEmitter.cpp
index 7e9130b0a16..679abb388c4 100644
--- a/llvm/lib/Target/X86/X86MCCodeEmitter.cpp
+++ b/llvm/lib/Target/X86/X86MCCodeEmitter.cpp
@@ -33,6 +33,24 @@ public:
   }
 
   ~X86MCCodeEmitter() {}
+
+  unsigned getNumFixupKinds() const {
+    return 5;
+  }
+
+  MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
+    static MCFixupKindInfo Infos[] = {
+      { "reloc_pcrel_word", 0, 4 * 8 },
+      { "reloc_picrel_word", 0, 4 * 8 },
+      { "reloc_absolute_word", 0, 4 * 8 },
+      { "reloc_absolute_word_sext", 0, 4 * 8 },
+      { "reloc_absolute_dword", 0, 8 * 8 }
+    };
+
+    assert(Kind >= FirstTargetFixupKind && Kind < MaxTargetFixupKind &&
+           "Invalid kind!");
+    return Infos[Kind - FirstTargetFixupKind];
+  }
   
   static unsigned GetX86RegNum(const MCOperand &MO) {
     return X86RegisterInfo::getX86RegNum(MO.getReg());
@@ -75,7 +93,8 @@ public:
                         unsigned RegOpcodeField, intptr_t PCAdj,
                         raw_ostream &OS) const;
   
-  void EncodeInstruction(const MCInst &MI, raw_ostream &OS) const;
+  void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+                         SmallVectorImpl<MCFixup> &Fixups) const;
   
 };
 
@@ -379,7 +398,8 @@ static unsigned DetermineREXPrefix(const MCInst &MI, unsigned TSFlags,
 }
 
 void X86MCCodeEmitter::
-EncodeInstruction(const MCInst &MI, raw_ostream &OS) const {
+EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+                  SmallVectorImpl<MCFixup> &Fixups) const {
   unsigned Opcode = MI.getOpcode();
   const TargetInstrDesc &Desc = TII.get(Opcode);
   unsigned TSFlags = Desc.TSFlags;