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| author | Tom Stellard <thomas.stellard@amd.com> | 2014-07-21 14:01:12 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2014-07-21 14:01:12 +0000 |
| commit | b2114caf627f38eaa7905d3ad911971206b1caa9 (patch) | |
| tree | 4c0f4156abd66c17fd71f821a17849da463424a8 /llvm/lib | |
| parent | 54a3b65bb9a7b5ae038a013abbf02dfc108af899 (diff) | |
| download | bcm5719-llvm-b2114caf627f38eaa7905d3ad911971206b1caa9.tar.gz bcm5719-llvm-b2114caf627f38eaa7905d3ad911971206b1caa9.zip | |
R600/SI: Add isCFDepth0 Predicate to SALU addc pattern
llvm-svn: 213529
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/R600/SIInstructions.td | 26 |
1 files changed, 16 insertions, 10 deletions
diff --git a/llvm/lib/Target/R600/SIInstructions.td b/llvm/lib/Target/R600/SIInstructions.td index 4257f4e39bf..15f77b3d0b3 100644 --- a/llvm/lib/Target/R600/SIInstructions.td +++ b/llvm/lib/Target/R600/SIInstructions.td @@ -1784,13 +1784,21 @@ def : Pat < (S_MOV_B32 0), sub1) >; -} // Predicates = [isSI, isCFDepth0] - -let Predicates = [isSI] in { //===----------------------------------------------------------------------===// // SOP2 Patterns //===----------------------------------------------------------------------===// +// V_ADD_I32_e32/S_ADD_I32 produces carry in VCC/SCC. For the vector +// case, the sgpr-copies pass will fix this to use the vector version. +def : Pat < + (i32 (addc i32:$src0, i32:$src1)), + (S_ADD_I32 $src0, $src1) +>; + +} // Predicates = [isSI, isCFDepth0] + +let Predicates = [isSI] in { + //===----------------------------------------------------------------------===// // SOPP Patterns //===----------------------------------------------------------------------===// @@ -1854,6 +1862,11 @@ def : Pat < (V_MOV_B32_e32 0), sub1) >; +def : Pat < + (addc i32:$src0, i32:$src1), + (V_ADD_I32_e32 $src0, $src1) +>; + /********** ======================= **********/ /********** Image sampling patterns **********/ /********** ======================= **********/ @@ -2848,13 +2861,6 @@ def : Pat < (V_CMP_EQ_I32_e64 (V_AND_B32_e32 (i32 1), $a), 1) >; -// V_ADD_I32_e32/S_ADD_I32 produces carry in VCC/SCC. For the vector -// case, the sgpr-copies pass will fix this to use the vector version. -def : Pat < - (i32 (addc i32:$src0, i32:$src1)), - (S_ADD_I32 $src0, $src1) ->; - //============================================================================// // Miscellaneous Optimization Patterns //============================================================================// |
