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| author | Elena Demikhovsky <elena.demikhovsky@intel.com> | 2013-07-31 12:03:08 +0000 |
|---|---|---|
| committer | Elena Demikhovsky <elena.demikhovsky@intel.com> | 2013-07-31 12:03:08 +0000 |
| commit | b0a75431add79618d79d7d414f3e4dfaacdb97f1 (patch) | |
| tree | a962327f62960b2b93457c1d3d4bae4247747a52 /llvm/lib | |
| parent | 6a06ba36ba5f8466c07f5f097524ae064ac80e46 (diff) | |
| download | bcm5719-llvm-b0a75431add79618d79d7d414f3e4dfaacdb97f1.tar.gz bcm5719-llvm-b0a75431add79618d79d7d414f3e4dfaacdb97f1.zip | |
Fixed assertion in Extract128BitVector()
llvm-svn: 187493
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index efc07812607..6ebbf871995 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -101,7 +101,8 @@ static SDValue ExtractSubVector(SDValue Vec, unsigned IdxVal, /// lowering EXTRACT_VECTOR_ELT operations easier. static SDValue Extract128BitVector(SDValue Vec, unsigned IdxVal, SelectionDAG &DAG, SDLoc dl) { - assert(Vec.getValueType().is256BitVector() && "Unexpected vector size!"); + assert((Vec.getValueType().is256BitVector() || + Vec.getValueType().is512BitVector()) && "Unexpected vector size!"); return ExtractSubVector(Vec, IdxVal, DAG, dl, 128); } |
