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authorJakob Stoklund Olesen <stoklund@2pi.dk>2012-09-17 23:03:21 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2012-09-17 23:03:21 +0000
commitaf50f17df4f8092bb04ccb5393ffaf34ab34d006 (patch)
tree7dd6c67f117fea0cd1510e8c4a61ac9d2d02f0a2 /llvm/lib
parent8e7f202e32149f86bb15813398cc8f3b92b12387 (diff)
downloadbcm5719-llvm-af50f17df4f8092bb04ccb5393ffaf34ab34d006.tar.gz
bcm5719-llvm-af50f17df4f8092bb04ccb5393ffaf34ab34d006.zip
Stop adding <imp-def> operands when expanding REG_SEQUENCE.
These extra operands are not needed by register allocators using VirtRegRewriter, and RAFast don't need them any longer. By omitting the <imp-def> operands, it becomes possible for the new register coalescer to track which lanes are valid and which are undef. llvm-svn: 164073
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/CodeGen/TwoAddressInstructionPass.cpp4
1 files changed, 0 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
index bd12f921328..df33a94ca76 100644
--- a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -1758,10 +1758,6 @@ bool TwoAddressInstructionPass::EliminateRegSequences() {
if (MO.isReg() && MO.isDef() && MO.getReg() == DstReg)
MO.setIsUndef();
}
- // Make sure there is a full non-subreg imp-def operand on the
- // instruction. This shouldn't be necessary, but it seems that at least
- // RAFast requires it.
- Def->addRegisterDefined(DstReg, TRI);
DEBUG(dbgs() << "First def: " << *Def);
}
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