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| author | Alkis Evlogimenos <alkis@evlogimenos.com> | 2004-02-23 18:14:48 +0000 |
|---|---|---|
| committer | Alkis Evlogimenos <alkis@evlogimenos.com> | 2004-02-23 18:14:48 +0000 |
| commit | af2de4848ee302d18c3894fb12ebcde71752dbdd (patch) | |
| tree | 43590363403eb45df671710b2bc40d05c0f6bd3e /llvm/lib | |
| parent | cb185a34bbed7fbf1fb84c8b00d4a81011363b16 (diff) | |
| download | bcm5719-llvm-af2de4848ee302d18c3894fb12ebcde71752dbdd.tar.gz bcm5719-llvm-af2de4848ee302d18c3894fb12ebcde71752dbdd.zip | |
Refactor rewinding code for finding the first terminator of a basic
block into MachineBasicBlock::getFirstTerminator().
This also fixes a bug in the implementation of the above in both
RegAllocLocal and InstrSched, where instructions where added after the
terminator if the basic block's only instruction was a terminator (it
shouldn't matter for RegAllocLocal since this case never occurs in
practice).
llvm-svn: 11748
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/MachineBasicBlock.cpp | 12 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/PHIElimination.cpp | 17 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/RegAllocLocal.cpp | 6 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/InstSelectSimple.cpp | 7 |
4 files changed, 15 insertions, 27 deletions
diff --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp b/llvm/lib/CodeGen/MachineBasicBlock.cpp index 9d65453edff..89763ba4f3b 100644 --- a/llvm/lib/CodeGen/MachineBasicBlock.cpp +++ b/llvm/lib/CodeGen/MachineBasicBlock.cpp @@ -15,6 +15,8 @@ #include "llvm/BasicBlock.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstr.h" +#include "llvm/Target/TargetInstrInfo.h" +#include "llvm/Target/TargetMachine.h" #include "Support/LeakDetector.h" using namespace llvm; @@ -56,6 +58,16 @@ void ilist_traits<MachineInstr>::transferNodesFromList( first->parent = toList.parent; } +MachineBasicBlock::iterator MachineBasicBlock::getFirstTerminator() +{ + const TargetInstrInfo& TII = MachineFunction::get( + getBasicBlock()->getParent()).getTarget().getInstrInfo(); + iterator I = end(); + while (I != begin() && TII.isTerminatorInstr((--I)->getOpcode())); + if (I != end() && !TII.isTerminatorInstr(I->getOpcode())) ++I; + return I; +} + void MachineBasicBlock::dump() const { print(std::cerr); diff --git a/llvm/lib/CodeGen/PHIElimination.cpp b/llvm/lib/CodeGen/PHIElimination.cpp index 06305826e80..ea464c94232 100644 --- a/llvm/lib/CodeGen/PHIElimination.cpp +++ b/llvm/lib/CodeGen/PHIElimination.cpp @@ -143,22 +143,7 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { // source path the PHI. MachineBasicBlock &opBlock = *MI->getOperand(i).getMachineBasicBlock(); - // Figure out where to insert the copy, which is at the end of the - // predecessor basic block, but before any terminator/branch - // instructions... - MachineBasicBlock::iterator I = opBlock.end(); - if (I != opBlock.begin()) { // Handle empty blocks - --I; - // must backtrack over ALL the branches in the previous block - while (MII.isTerminatorInstr(I->getOpcode()) && - I != opBlock.begin()) - --I; - - // move back to the first branch instruction so new instructions - // are inserted right in front of it and not in front of a non-branch - if (!MII.isTerminatorInstr(I->getOpcode())) - ++I; - } + MachineBasicBlock::iterator I = opBlock.getFirstTerminator(); // Check to make sure we haven't already emitted the copy for this block. // This can happen because PHI nodes may have multiple entries for the diff --git a/llvm/lib/CodeGen/RegAllocLocal.cpp b/llvm/lib/CodeGen/RegAllocLocal.cpp index 38e00733602..a3d66391cce 100644 --- a/llvm/lib/CodeGen/RegAllocLocal.cpp +++ b/llvm/lib/CodeGen/RegAllocLocal.cpp @@ -649,11 +649,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { } } - // Rewind the iterator to point to the first flow control instruction... - const TargetInstrInfo &TII = TM->getInstrInfo(); - MI = MBB.end(); - while (MI != MBB.begin() && TII.isTerminatorInstr((--MI)->getOpcode())); - if (MI != MBB.end()) ++MI; + MI = MBB.getFirstTerminator(); // Spill all physical registers holding virtual registers now. for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i) diff --git a/llvm/lib/Target/X86/InstSelectSimple.cpp b/llvm/lib/Target/X86/InstSelectSimple.cpp index 2675a04ccf7..4ebffeb81be 100644 --- a/llvm/lib/Target/X86/InstSelectSimple.cpp +++ b/llvm/lib/Target/X86/InstSelectSimple.cpp @@ -679,7 +679,6 @@ static bool RequiresFPRegKill(const BasicBlock *BB) { // void ISel::InsertFPRegKills() { SSARegMap &RegMap = *F->getSSARegMap(); - const TargetInstrInfo &TII = TM.getInstrInfo(); for (MachineFunction::iterator BB = F->begin(), E = F->end(); BB != E; ++BB) { for (MachineBasicBlock::iterator I = BB->begin(), E = BB->end(); I!=E; ++I) @@ -709,11 +708,7 @@ void ISel::InsertFPRegKills() { // it's not an unwind/return), insert the FP_REG_KILL instruction. if (BB->getBasicBlock()->getTerminator()->getNumSuccessors() && RequiresFPRegKill(BB->getBasicBlock())) { - // Rewind past any terminator instructions that might exist. - MachineBasicBlock::iterator I = BB->end(); - while (I != BB->begin() && TII.isTerminatorInstr((--I)->getOpcode())); - if (I != BB->end()) ++I; - BMI(BB, I, X86::FP_REG_KILL, 0); + BMI(BB, BB->getFirstTerminator(), X86::FP_REG_KILL, 0); ++NumFPKill; } } |

