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authorQuentin Colombet <qcolombet@apple.com>2016-04-07 22:52:49 +0000
committerQuentin Colombet <qcolombet@apple.com>2016-04-07 22:52:49 +0000
commitac40034e06a74d2a7da8a28cc2eed87498fa8a20 (patch)
tree30099ee4cc8b3776641b7fce8c061f481e3e77b1 /llvm/lib
parentf9f3609704c1f5cdcdc8ef04dfdf5234217d6686 (diff)
downloadbcm5719-llvm-ac40034e06a74d2a7da8a28cc2eed87498fa8a20.tar.gz
bcm5719-llvm-ac40034e06a74d2a7da8a28cc2eed87498fa8a20.zip
[RegisterBankInfo] Strengthen getInstrMappingImpl.
Teach the target independent code how to take advantage of type information to get the mapping of an instruction. llvm-svn: 265739
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp35
1 files changed, 21 insertions, 14 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp b/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
index f1d997eaa70..e63f561b7e7 100644
--- a/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
@@ -18,6 +18,7 @@
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/IR/Type.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetInstrInfo.h"
@@ -255,18 +256,26 @@ RegisterBankInfo::getInstrMappingImpl(const MachineInstr &MI) const {
// the register bank from the encoding constraints.
CurRegBank = getRegBankFromConstraints(MI, OpIdx, TII, TRI);
if (!CurRegBank) {
- // All our attempts failed, give up.
- CompleteMapping = false;
-
- if (!isCopyLike)
- // MI does not carry enough information to guess the mapping.
- return InstructionMapping();
-
- // For copies, we want to keep interating to find a register
- // bank for the other operands if we did not find one yet.
- if (RegBank)
- break;
- continue;
+ // Check if we can deduce the register bank from the type of
+ // the instruction.
+ Type *MITy = MI.getType();
+ if (MITy)
+ CurRegBank = getRegBankForType(
+ MVT::getVT(MITy, /*HandleUnknown*/ true).SimpleTy);
+ if (!CurRegBank) {
+ // All our attempts failed, give up.
+ CompleteMapping = false;
+
+ if (!isCopyLike)
+ // MI does not carry enough information to guess the mapping.
+ return InstructionMapping();
+
+ // For copies, we want to keep interating to find a register
+ // bank for the other operands if we did not find one yet.
+ if (RegBank)
+ break;
+ continue;
+ }
}
}
RegBank = CurRegBank;
@@ -298,11 +307,9 @@ RegisterBankInfo::getInstrMappingImpl(const MachineInstr &MI) const {
RegisterBankInfo::InstructionMapping
RegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
- if (!isPreISelGenericOpcode(MI.getOpcode())) {
RegisterBankInfo::InstructionMapping Mapping = getInstrMappingImpl(MI);
if (Mapping.isValid())
return Mapping;
- }
llvm_unreachable("The target must implement this");
}
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