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authorSimon Pilgrim <llvm-dev@redking.me.uk>2018-12-13 12:23:32 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2018-12-13 12:23:32 +0000
commitab973a45b9796500955202ca606cf0bed083109b (patch)
tree4baba8d1f76529cf764a83e3a2160c9c50844668 /llvm/lib
parent1a4e2cc27a6cade6bf851edd93856f5a8c8482f0 (diff)
downloadbcm5719-llvm-ab973a45b9796500955202ca606cf0bed083109b.tar.gz
bcm5719-llvm-ab973a45b9796500955202ca606cf0bed083109b.zip
[DAGCombine] Moved X86 rotate_amount % bitwidth == 0 early out to DAGCombiner
Remove common code from custom lowering (code is still safe if somehow a zero value gets used). llvm-svn: 349028
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp7
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp9
2 files changed, 8 insertions, 8 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index d6defa5dc0b..7768d12c75c 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -6314,6 +6314,13 @@ SDValue DAGCombiner::visitRotate(SDNode *N) {
if (isNullOrNullSplat(N1))
return N0;
+ // fold (rot x, c) -> x iff (c % BitSize) == 0
+ if (isPowerOf2_32(Bitsize) && Bitsize > 1) {
+ APInt ModuloMask(N1.getScalarValueSizeInBits(), Bitsize - 1);
+ if (DAG.MaskedValueIsZero(N1, ModuloMask))
+ return N0;
+ }
+
// fold (rot x, c) -> (rot x, c % BitSize)
if (ConstantSDNode *Cst = isConstOrConstSplat(N1)) {
if (Cst->getAPIntValue().uge(Bitsize)) {
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 386343d19da..63dd8295cdf 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -24793,9 +24793,6 @@ static SDValue LowerRotate(SDValue Op, const X86Subtarget &Subtarget,
if (auto *BVAmt = dyn_cast<BuildVectorSDNode>(Amt)) {
if (auto *RotateConst = BVAmt->getConstantSplatNode()) {
uint64_t RotateAmt = RotateConst->getAPIntValue().urem(EltSizeInBits);
- if (RotateAmt == 0)
- return R;
-
return DAG.getNode(X86ISD::VROTLI, DL, VT, R,
DAG.getConstant(RotateAmt, DL, MVT::i8));
}
@@ -24816,12 +24813,8 @@ static SDValue LowerRotate(SDValue Op, const X86Subtarget &Subtarget,
// Rotate by an uniform constant - expand back to shifts.
if (auto *BVAmt = dyn_cast<BuildVectorSDNode>(Amt))
- if (auto *RotateConst = BVAmt->getConstantSplatNode()) {
- uint64_t RotateAmt = RotateConst->getAPIntValue().urem(EltSizeInBits);
- if (RotateAmt == 0)
- return R;
+ if (BVAmt->getConstantSplatNode())
return SDValue();
- }
// TODO: ISD::ROT* uses modulo rotate amounts, we need to handle this.
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