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authorAaron Ballman <aaron@aaronballman.com>2013-06-10 16:45:40 +0000
committerAaron Ballman <aaron@aaronballman.com>2013-06-10 16:45:40 +0000
commitab1d27ed67d1974583790dd8a487fa3ceb39e056 (patch)
treebe27b0826f5a7d8915c50e39c03aa1f1e2875c6d /llvm/lib
parent79de34f75c810122536e1b8a0ea9329f3adcbec4 (diff)
downloadbcm5719-llvm-ab1d27ed67d1974583790dd8a487fa3ceb39e056.tar.gz
bcm5719-llvm-ab1d27ed67d1974583790dd8a487fa3ceb39e056.zip
Silencing an MSVC warning about comparing signed and unsigned values.
llvm-svn: 183682
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
index d83567c8854..679d3c4a85b 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
@@ -461,7 +461,7 @@ void ARMELFStreamer::EmitRegSave(const SmallVectorImpl<unsigned> &RegList,
const MCRegisterInfo &MRI = getContext().getRegisterInfo();
for (size_t i = 0; i < RegList.size(); ++i) {
unsigned Reg = MRI.getEncodingValue(RegList[i]);
- assert(Reg < (IsVector ? 32 : 16) && "Register out of range");
+ assert(Reg < (IsVector ? 32U : 16U) && "Register out of range");
unsigned Bit = (1u << Reg);
if ((Mask & Bit) == 0) {
Mask |= Bit;
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