diff options
author | Diogo N. Sampaio <diogo.sampaio@arm.com> | 2019-04-10 13:34:18 +0000 |
---|---|---|
committer | Diogo N. Sampaio <diogo.sampaio@arm.com> | 2019-04-10 13:34:18 +0000 |
commit | aae424a2d2669bc2167a6983fd0dba07fae40cff (patch) | |
tree | 64cad5545c508b902c165cacf044b6b18dff4e65 /llvm/lib | |
parent | 71660b032164ab4ba9f0f3d74db77e032f0b09f6 (diff) | |
download | bcm5719-llvm-aae424a2d2669bc2167a6983fd0dba07fae40cff.tar.gz bcm5719-llvm-aae424a2d2669bc2167a6983fd0dba07fae40cff.zip |
[AArch64] Add lowering pattern for scalar fp16 facge and facgt
Summary: The fp16 scalar version of facge and facgt requires a custom patter matching, as the result type is not the same width of the operands.
Reviewers: olista01, javed.absar, pbarrio
Reviewed By: javed.absar
Subscribers: kristof.beyls, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60212
llvm-svn: 358083
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/AArch64/AArch64InstrInfo.td | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td index c54970331ab..06d25bb3e37 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td @@ -5355,6 +5355,16 @@ def : Pat<(i64 (int_aarch64_neon_vcvtfp2fxu (f16 FPR16:$Rn), vecshiftR64:$imm)), (i64 (IMPLICIT_DEF)), (FCVTZUh FPR16:$Rn, vecshiftR64:$imm), hsub))>; +def : Pat<(i32 (int_aarch64_neon_facge (f16 FPR16:$Rn), (f16 FPR16:$Rm))), + (i32 (INSERT_SUBREG + (i32 (IMPLICIT_DEF)), + (FACGE16 FPR16:$Rn, FPR16:$Rm), + hsub))>; +def : Pat<(i32 (int_aarch64_neon_facgt (f16 FPR16:$Rn), (f16 FPR16:$Rm))), + (i32 (INSERT_SUBREG + (i32 (IMPLICIT_DEF)), + (FACGT16 FPR16:$Rn, FPR16:$Rm), + hsub))>; defm SHL : SIMDScalarLShiftD< 0, 0b01010, "shl", AArch64vshl>; defm SLI : SIMDScalarLShiftDTied<1, 0b01010, "sli">; |