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author | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2017-08-16 04:43:49 +0000 |
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committer | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2017-08-16 04:43:49 +0000 |
commit | a9487d92d74c60d9d65a2880d08901354f4eea7a (patch) | |
tree | 20d9a8df89add53701e1939f92c571661b1b326d /llvm/lib | |
parent | 0c6374e51325d3f4f69f091b2ac85ff273274afe (diff) | |
download | bcm5719-llvm-a9487d92d74c60d9d65a2880d08901354f4eea7a.tar.gz bcm5719-llvm-a9487d92d74c60d9d65a2880d08901354f4eea7a.zip |
[AMDGPU] Eliminate no effect instructions before s_endpgm
Differential Revision: https://reviews.llvm.org/D36585
llvm-svn: 310987
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 66 |
1 files changed, 63 insertions, 3 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp b/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp index d54bde49e65..19a437f10f1 100644 --- a/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp +++ b/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp @@ -111,9 +111,62 @@ bool SIOptimizeExecMaskingPreRA::runOnMachineFunction(MachineFunction &MF) { const SIInstrInfo *TII = ST.getInstrInfo(); MachineRegisterInfo &MRI = MF.getRegInfo(); LiveIntervals *LIS = &getAnalysis<LiveIntervals>(); + DenseSet<unsigned> RecalcRegs({AMDGPU::EXEC_LO, AMDGPU::EXEC_HI}); bool Changed = false; for (MachineBasicBlock &MBB : MF) { + + // Try to remove unneeded instructions before s_endpgm. + if (MBB.succ_empty()) { + if (MBB.empty() || MBB.back().getOpcode() != AMDGPU::S_ENDPGM) + continue; + + SmallVector<MachineBasicBlock*, 4> Blocks({&MBB}); + + while (!Blocks.empty()) { + auto CurBB = Blocks.pop_back_val(); + auto I = CurBB->rbegin(), E = CurBB->rend(); + if (I != E) { + if (I->isUnconditionalBranch() || I->getOpcode() == AMDGPU::S_ENDPGM) + ++I; + else if (I->isBranch()) + continue; + } + + while (I != E) { + if (I->isDebugValue()) + continue; + if (I->mayStore() || I->isBarrier() || I->isCall() || + I->hasUnmodeledSideEffects() || I->hasOrderedMemoryRef()) + break; + + DEBUG(dbgs() << "Removing no effect instruction: " << *I << '\n'); + + for (auto &Op : I->operands()) + if (Op.isReg()) + RecalcRegs.insert(Op.getReg()); + + auto Next = std::next(I); + LIS->RemoveMachineInstrFromMaps(*I); + I->eraseFromParent(); + I = Next; + + Changed = true; + } + + if (I != E) + continue; + + // Try to ascend predecessors. + for (auto *Pred : CurBB->predecessors()) { + if (Pred->succ_size() == 1) + Blocks.push_back(Pred); + } + } + continue; + } + + // Try to collapse adjacent endifs. auto Lead = MBB.begin(), E = MBB.end(); if (MBB.succ_size() != 1 || Lead == E || !isEndCF(*Lead, TRI)) continue; @@ -174,9 +227,16 @@ bool SIOptimizeExecMaskingPreRA::runOnMachineFunction(MachineFunction &MF) { } if (Changed) { - // Recompute liveness for both reg units of exec. - LIS->removeRegUnit(*MCRegUnitIterator(AMDGPU::EXEC_LO, TRI)); - LIS->removeRegUnit(*MCRegUnitIterator(AMDGPU::EXEC_HI, TRI)); + for (auto Reg : RecalcRegs) { + if (TargetRegisterInfo::isVirtualRegister(Reg)) { + LIS->removeInterval(Reg); + if (!MRI.reg_empty(Reg)) + LIS->createAndComputeVirtRegInterval(Reg); + } else { + for (MCRegUnitIterator U(Reg, TRI); U.isValid(); ++U) + LIS->removeRegUnit(*U); + } + } } return Changed; |