diff options
| author | Diana Picus <diana.picus@linaro.org> | 2017-10-06 14:52:43 +0000 |
|---|---|---|
| committer | Diana Picus <diana.picus@linaro.org> | 2017-10-06 14:52:43 +0000 |
| commit | a81a4b17e5abbd47f8a61b27b3b110195abeac08 (patch) | |
| tree | cfb09d42af396320bf32c10fdc56c8c257eb858e /llvm/lib | |
| parent | 8aedfde298a8717c2af7735b93512b50ce97dfcb (diff) | |
| download | bcm5719-llvm-a81a4b17e5abbd47f8a61b27b3b110195abeac08.tar.gz bcm5719-llvm-a81a4b17e5abbd47f8a61b27b3b110195abeac08.zip | |
[ARM] GlobalISel: Map shift operands to GPRs
llvm-svn: 315067
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp b/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp index 2400e1af246..c01cc064e1a 100644 --- a/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp +++ b/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp @@ -218,6 +218,9 @@ ARMRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const { case G_AND: case G_OR: case G_XOR: + case G_LSHR: + case G_ASHR: + case G_SHL: case G_SDIV: case G_UDIV: case G_SEXT: |
