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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-05-12 15:16:29 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-05-12 15:16:29 +0000 |
| commit | a7fc7630829b93247e8dc11df93ce155158a49fd (patch) | |
| tree | 89cc1a825cdcb1ebaed61b3bac76467fcbacc9c3 /llvm/lib | |
| parent | 2de619099a6c64dbbe9ab4393fcda56b5e9d8592 (diff) | |
| download | bcm5719-llvm-a7fc7630829b93247e8dc11df93ce155158a49fd.tar.gz bcm5719-llvm-a7fc7630829b93247e8dc11df93ce155158a49fd.zip | |
[X86][AVX] Split VZEXT_MOVL ymm/zmm if the upper elements are not demanded.
Removes unnecessary vzeroupper noted in D61806
llvm-svn: 360543
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index b538694b49b..10632434c3d 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -33593,6 +33593,18 @@ bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode( ExtSizeInBits = SizeInBits / 4; switch (Opc) { + // Zero upper elements. + case X86ISD::VZEXT_MOVL: { + SDLoc DL(Op); + SDValue Ext0 = + extractSubVector(Op.getOperand(0), 0, TLO.DAG, DL, ExtSizeInBits); + SDValue ExtOp = + TLO.DAG.getNode(Opc, DL, Ext0.getValueType(), Ext0); + SDValue UndefVec = TLO.DAG.getUNDEF(VT); + SDValue Insert = + insertSubVector(UndefVec, ExtOp, 0, TLO.DAG, DL, ExtSizeInBits); + return TLO.CombineTo(Op, Insert); + } // Byte shifts by immediate. case X86ISD::VSHLDQ: case X86ISD::VSRLDQ: |
