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| author | Colin LeMahieu <colinl@codeaurora.org> | 2015-01-29 16:08:43 +0000 |
|---|---|---|
| committer | Colin LeMahieu <colinl@codeaurora.org> | 2015-01-29 16:08:43 +0000 |
| commit | a749b3ee6a1598e1d0050524227f59348098fd30 (patch) | |
| tree | 9cde2f59d3c01f17b1e716780e73b4fcf0d2979a /llvm/lib | |
| parent | bebb0a69eb7d6a75b87591f6d343620033197106 (diff) | |
| download | bcm5719-llvm-a749b3ee6a1598e1d0050524227f59348098fd30.tar.gz bcm5719-llvm-a749b3ee6a1598e1d0050524227f59348098fd30.zip | |
[Hexagon] Adding XTYPE/PRED intrinsic tests. Converting predicate types to i32 instead of i1.
llvm-svn: 227457
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonIntrinsics.td | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonIntrinsicsV4.td | 15 | ||||
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonIntrinsicsV5.td | 11 |
3 files changed, 30 insertions, 0 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonIntrinsics.td b/llvm/lib/Target/Hexagon/HexagonIntrinsics.td index 0ba96bc60b5..8ec3e11d77b 100644 --- a/llvm/lib/Target/Hexagon/HexagonIntrinsics.td +++ b/llvm/lib/Target/Hexagon/HexagonIntrinsics.td @@ -135,6 +135,10 @@ class T_FF_pat <InstHexagon MI, Intrinsic IntID> : Pat<(IntID F32:$Rs, F32:$Rt), (MI F32:$Rs, F32:$Rt)>; +class T_DD_pat <InstHexagon MI, Intrinsic IntID> + : Pat<(IntID F64:$Rs, F64:$Rt), + (MI F64:$Rs, F64:$Rt)>; + class T_FFF_pat <InstHexagon MI, Intrinsic IntID> : Pat<(IntID F32:$Rs, F32:$Rt, F32:$Ru), (MI F32:$Rs, F32:$Rt, F32:$Ru)>; diff --git a/llvm/lib/Target/Hexagon/HexagonIntrinsicsV4.td b/llvm/lib/Target/Hexagon/HexagonIntrinsicsV4.td index b51adac56a5..4b1cf3f4c02 100644 --- a/llvm/lib/Target/Hexagon/HexagonIntrinsicsV4.td +++ b/llvm/lib/Target/Hexagon/HexagonIntrinsicsV4.td @@ -42,6 +42,21 @@ def: T_RR_pat<C4_nbitsset, int_hexagon_C4_nbitsset>; def: T_RR_pat<C4_nbitsclr, int_hexagon_C4_nbitsclr>; def: T_RI_pat<C4_nbitsclri, int_hexagon_C4_nbitsclri>; +def : T_RR_pat<A4_cmpbeq, int_hexagon_A4_cmpbeq>; +def : T_RR_pat<A4_cmpbgt, int_hexagon_A4_cmpbgt>; +def : T_RR_pat<A4_cmpbgtu, int_hexagon_A4_cmpbgtu>; +def : T_RR_pat<A4_cmpheq, int_hexagon_A4_cmpheq>; +def : T_RR_pat<A4_cmphgt, int_hexagon_A4_cmphgt>; +def : T_RR_pat<A4_cmphgtu, int_hexagon_A4_cmphgtu>; + +def : T_RI_pat<A4_cmpbeqi, int_hexagon_A4_cmpbeqi>; +def : T_RI_pat<A4_cmpbgti, int_hexagon_A4_cmpbgti>; +def : T_RI_pat<A4_cmpbgtui, int_hexagon_A4_cmpbgtui>; + +def : T_RI_pat<A4_cmpheqi, int_hexagon_A4_cmpheqi>; +def : T_RI_pat<A4_cmphgti, int_hexagon_A4_cmphgti>; +def : T_RI_pat<A4_cmphgtui, int_hexagon_A4_cmphgtui>; + def : T_RP_pat <A4_boundscheck, int_hexagon_A4_boundscheck>; def : T_PR_pat<A4_tlbmatch, int_hexagon_A4_tlbmatch>; diff --git a/llvm/lib/Target/Hexagon/HexagonIntrinsicsV5.td b/llvm/lib/Target/Hexagon/HexagonIntrinsicsV5.td index b9beb301b51..b2abe962717 100644 --- a/llvm/lib/Target/Hexagon/HexagonIntrinsicsV5.td +++ b/llvm/lib/Target/Hexagon/HexagonIntrinsicsV5.td @@ -33,6 +33,17 @@ def : T_FFF_pat <F2_sffma_lib, int_hexagon_F2_sffma_lib>; def : T_FFF_pat <F2_sffms_lib, int_hexagon_F2_sffms_lib>; def : T_FFFQ_pat <F2_sffma_sc, int_hexagon_F2_sffma_sc>; +// Compare floating-point value +def : T_FF_pat <F2_sfcmpge, int_hexagon_F2_sfcmpge>; +def : T_FF_pat <F2_sfcmpuo, int_hexagon_F2_sfcmpuo>; +def : T_FF_pat <F2_sfcmpeq, int_hexagon_F2_sfcmpeq>; +def : T_FF_pat <F2_sfcmpgt, int_hexagon_F2_sfcmpgt>; + +def : T_DD_pat <F2_dfcmpeq, int_hexagon_F2_dfcmpeq>; +def : T_DD_pat <F2_dfcmpgt, int_hexagon_F2_dfcmpgt>; +def : T_DD_pat <F2_dfcmpge, int_hexagon_F2_dfcmpge>; +def : T_DD_pat <F2_dfcmpuo, int_hexagon_F2_dfcmpuo>; + // Create floating-point value def : T_I_pat <F2_sfimm_p, int_hexagon_F2_sfimm_p>; def : T_I_pat <F2_sfimm_n, int_hexagon_F2_sfimm_n>; |
