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author | Owen Anderson <resistor@mac.com> | 2011-04-14 17:30:49 +0000 |
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committer | Owen Anderson <resistor@mac.com> | 2011-04-14 17:30:49 +0000 |
commit | a519284fecb61e882b02c5ee7e3f06daa0ba4ffd (patch) | |
tree | 9e15c53daed84c15cb612f75cdfb5f15be98461b /llvm/lib | |
parent | 23c84767484c846fa08812bd251a298095ab6afa (diff) | |
download | bcm5719-llvm-a519284fecb61e882b02c5ee7e3f06daa0ba4ffd.tar.gz bcm5719-llvm-a519284fecb61e882b02c5ee7e3f06daa0ba4ffd.zip |
Fix another instance of the DAG combiner not using the correct type for the RHS of a shift.
llvm-svn: 129522
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 6ad85fa130a..378c13b0301 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -3323,8 +3323,10 @@ SDValue DAGCombiner::visitSRL(SDNode *N) { return DAG.getUNDEF(VT); if (!LegalTypes || TLI.isTypeDesirableForOp(ISD::SRL, SmallVT)) { + uint64_t ShiftAmt = N1C->getZExtValue(); SDValue SmallShift = DAG.getNode(ISD::SRL, N0.getDebugLoc(), SmallVT, - N0.getOperand(0), N1); + N0.getOperand(0), + DAG.getConstant(ShiftAmt, getShiftAmountTy(SmallVT))); AddToWorkList(SmallShift.getNode()); return DAG.getNode(ISD::ANY_EXTEND, N->getDebugLoc(), VT, SmallShift); } @@ -6264,7 +6266,7 @@ SDValue DAGCombiner::visitSTORE(SDNode *N) { Ptr, ST->getPointerInfo(), ST->isVolatile(), ST->isNonTemporal(), OrigAlign); } - + // Turn 'store undef, Ptr' -> nothing. if (Value.getOpcode() == ISD::UNDEF && ST->isUnindexed()) return Chain; @@ -6303,7 +6305,7 @@ SDValue DAGCombiner::visitSTORE(SDNode *N) { Ptr, ST->getPointerInfo(), ST->isVolatile(), ST->isNonTemporal(), ST->getAlignment()); } - + if (!ST->isVolatile() && TLI.isOperationLegalOrCustom(ISD::STORE, MVT::i32)) { // Many FP stores are not made apparent until after legalize, e.g. for |