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authorOliver Stannard <oliver.stannard@arm.com>2014-09-29 10:57:29 +0000
committerOliver Stannard <oliver.stannard@arm.com>2014-09-29 10:57:29 +0000
commita4eba5ad70439b497af158727e69917266ee6783 (patch)
tree8d863fcccd591ab449f9eeaedc7ab01779ed1858 /llvm/lib
parent5bd68794393e51d65ad3c398dfc71ec2bdce7153 (diff)
downloadbcm5719-llvm-a4eba5ad70439b497af158727e69917266ee6783.tar.gz
bcm5719-llvm-a4eba5ad70439b497af158727e69917266ee6783.zip
[Thumb2] ldrexd and strexd are not defined on v7M
The Thumb2 ldrexd and strexd instructions are not defined for M-class architectures. llvm-svn: 218603
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/ARM/ARMInstrThumb2.td6
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrThumb2.td b/llvm/lib/Target/ARM/ARMInstrThumb2.td
index 00a9c8bf208..ac190585409 100644
--- a/llvm/lib/Target/ARM/ARMInstrThumb2.td
+++ b/llvm/lib/Target/ARM/ARMInstrThumb2.td
@@ -3309,7 +3309,8 @@ def t2LDREXD : T2I_ldrex<0b0111, (outs rGPR:$Rt, rGPR:$Rt2),
(ins addr_offset_none:$addr),
AddrModeNone, 4, NoItinerary,
"ldrexd", "\t$Rt, $Rt2, $addr", "",
- [], {?, ?, ?, ?}> {
+ [], {?, ?, ?, ?}>,
+ Requires<[IsThumb2, IsNotMClass]> {
bits<4> Rt2;
let Inst{11-8} = Rt2;
}
@@ -3385,7 +3386,8 @@ def t2STREXD : T2I_strex<0b0111, (outs rGPR:$Rd),
(ins rGPR:$Rt, rGPR:$Rt2, addr_offset_none:$addr),
AddrModeNone, 4, NoItinerary,
"strexd", "\t$Rd, $Rt, $Rt2, $addr", "", [],
- {?, ?, ?, ?}> {
+ {?, ?, ?, ?}>,
+ Requires<[IsThumb2, IsNotMClass]> {
bits<4> Rt2;
let Inst{11-8} = Rt2;
}
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