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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-03-26 11:39:07 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-03-26 11:39:07 +0000 |
| commit | a4b0c74765d22d6c16afca7b527a1fe2e24ae9e4 (patch) | |
| tree | ef0c753e9ff69426bed6326ee2d1070734a48e71 /llvm/lib | |
| parent | b5b7a616460e40d81260a4e6fc866d4fc7440cef (diff) | |
| download | bcm5719-llvm-a4b0c74765d22d6c16afca7b527a1fe2e24ae9e4.tar.gz bcm5719-llvm-a4b0c74765d22d6c16afca7b527a1fe2e24ae9e4.zip | |
[mips] The register names depend on the ABI being N32/N64 rather than the arch being mips64
Summary: Added test cases for O32 and N32 on MIPS64.
Reviewers: matheusalmeida
Reviewed By: matheusalmeida
Differential Revision: http://llvm-reviews.chandlerc.com/D3175
llvm-svn: 204796
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 33 |
1 files changed, 18 insertions, 15 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index ca11e35a440..d733caae500 100644 --- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -222,6 +222,7 @@ class MipsAsmParser : public MCTargetAsmParser { return (STI.getFeatureBits() & Mips::FeatureFP64Bit) != 0; } + bool isN32() const { return STI.getFeatureBits() & Mips::FeatureN32; } bool isN64() const { return STI.getFeatureBits() & Mips::FeatureN64; } bool isMicroMips() const { @@ -1035,21 +1036,23 @@ int MipsAsmParser::matchCPURegisterName(StringRef Name) { .Case("t9", 25) .Default(-1); - // Although SGI documentation just cuts out t0-t3 for n32/n64, - // GNU pushes the values of t0-t3 to override the o32/o64 values for t4-t7 - // We are supporting both cases, so for t0-t3 we'll just push them to t4-t7. - if (isMips64() && 8 <= CC && CC <= 11) - CC += 4; - - if (CC == -1 && isMips64()) - CC = StringSwitch<unsigned>(Name) - .Case("a4", 8) - .Case("a5", 9) - .Case("a6", 10) - .Case("a7", 11) - .Case("kt0", 26) - .Case("kt1", 27) - .Default(-1); + if (isN32() || isN64()) { + // Although SGI documentation just cuts out t0-t3 for n32/n64, + // GNU pushes the values of t0-t3 to override the o32/o64 values for t4-t7 + // We are supporting both cases, so for t0-t3 we'll just push them to t4-t7. + if (8 <= CC && CC <= 11) + CC += 4; + + if (CC == -1) + CC = StringSwitch<unsigned>(Name) + .Case("a4", 8) + .Case("a5", 9) + .Case("a6", 10) + .Case("a7", 11) + .Case("kt0", 26) + .Case("kt1", 27) + .Default(-1); + } warnIfAssemblerTemporary(CC); |

