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author | Sam Kolton <Sam.Kolton@amd.com> | 2016-06-03 11:43:09 +0000 |
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committer | Sam Kolton <Sam.Kolton@amd.com> | 2016-06-03 11:43:09 +0000 |
commit | a4a99ad1bcd8d63107be8f48422bf3896108dbf1 (patch) | |
tree | 8046fcc36de760e4352ae9c5d5f45eac1f6aef19 /llvm/lib | |
parent | 9c6cb035f380fb65061e3618b6f7f9c2b533d01b (diff) | |
download | bcm5719-llvm-a4a99ad1bcd8d63107be8f48422bf3896108dbf1.tar.gz bcm5719-llvm-a4a99ad1bcd8d63107be8f48422bf3896108dbf1.zip |
[AMDGPU] Assembler: More tests for SDWA instructions. Fix for SDWA float modifiers.
Summary: Depends on D20625
Reviewers: tstellarAMD, vpykhtin, artem.tamazov
Subscribers: arsenm, kzhuravl
Differential Revision: http://reviews.llvm.org/D20674
llvm-svn: 271662
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.td | 27 | ||||
-rw-r--r-- | llvm/lib/Target/AMDGPU/VIInstrFormats.td | 12 |
2 files changed, 23 insertions, 16 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td index d2fa1c8d319..e86e470685b 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td @@ -1246,19 +1246,20 @@ class getInsSDWA <RegisterClass Src0RC, RegisterClass Src1RC, int NumSrcArgs, !if (!eq(NumSrcArgs, 1), !if (!eq(HasModifiers, 1), // VOP1_SDWA with modifiers - (ins InputModsNoDefault:$src0_modifiers, Src0RC:$src0, + (ins InputModsNoDefault:$src0_fmodifiers, Src0RC:$src0, clampmod:$clamp, dst_sel:$dst_sel, dst_unused:$dst_unused, src0_sel:$src0_sel) /* else */, // VOP1_SDWA without modifiers + // FIXME: sext() modifier is not supported yet (ins Src0RC:$src0, dst_sel:$dst_sel, dst_unused:$dst_unused, src0_sel:$src0_sel) /* endif */) /* NumSrcArgs == 2 */, !if (!eq(HasModifiers, 1), // VOP2_SDWA with modifiers - (ins InputModsNoDefault:$src0_modifiers, Src0RC:$src0, - InputModsNoDefault:$src1_modifiers, Src1RC:$src1, + (ins InputModsNoDefault:$src0_fmodifiers, Src0RC:$src0, + InputModsNoDefault:$src1_fmodifiers, Src1RC:$src1, clampmod:$clamp, dst_sel:$dst_sel, dst_unused:$dst_unused, src0_sel:$src0_sel, src1_sel:$src1_sel) /* else */, @@ -1329,10 +1330,10 @@ class getAsmSDWA <bit HasDst, int NumSrcArgs, bit HasModifiers, ValueType DstVT "$sdst", "$vdst"), ""); // use $sdst for VOPC - string src0 = !if(!eq(NumSrcArgs, 1), "$src0_modifiers", "$src0_modifiers,"); + string src0 = !if(!eq(NumSrcArgs, 1), "$src0_fmodifiers", "$src0_fmodifiers,"); string src1 = !if(!eq(NumSrcArgs, 1), "", - !if(!eq(NumSrcArgs, 2), " $src1_modifiers", - " $src1_modifiers,")); + !if(!eq(NumSrcArgs, 2), " $src1_fmodifiers", + " $src1_fmodifiers,")); string args = !if(!eq(HasModifiers, 0), getAsm32<0, NumSrcArgs, DstVT>.ret, ", "#src0#src1#"$clamp"); @@ -1541,8 +1542,8 @@ def VOP_MAC : VOPProfile <[f32, f32, f32, f32]> { VGPR_32:$src2, // stub argument dpp_ctrl:$dpp_ctrl, row_mask:$row_mask, bank_mask:$bank_mask, bound_ctrl:$bound_ctrl); - let InsSDWA = (ins InputModsNoDefault:$src0_modifiers, Src0RC32:$src0, - InputModsNoDefault:$src1_modifiers, Src1RC32:$src1, + let InsSDWA = (ins InputModsNoDefault:$src0_fmodifiers, Src0RC32:$src0, + InputModsNoDefault:$src1_fmodifiers, Src1RC32:$src1, VGPR_32:$src2, // stub argument clampmod:$clamp, dst_sel:$dst_sel, dst_unused:$dst_unused, src0_sel:$src0_sel, src1_sel:$src1_sel); @@ -1669,13 +1670,15 @@ class VOP1_DPP <vop1 op, string opName, VOPProfile p> : class SDWADisableFields <VOPProfile p> { bits<8> src0 = !if(!eq(p.NumSrcArgs, 0), 0, ?); bits<3> src0_sel = !if(!eq(p.NumSrcArgs, 0), 6, ?); - bits<3> src0_modifiers = !if(p.HasModifiers, ?, 0); + bits<2> src0_fmodifiers = !if(p.HasModifiers, ?, 0); + bits<1> src0_imodifiers = 0; // FIXME: always 0 untill sext modifier is supported bits<3> src1_sel = !if(!eq(p.NumSrcArgs, 0), 6, !if(!eq(p.NumSrcArgs, 1), 6, ?)); - bits<3> src1_modifiers = !if(!eq(p.NumSrcArgs, 0), 0, - !if(!eq(p.NumSrcArgs, 1), 0, - !if(p.HasModifiers, ?, 0))); + bits<2> src1_fmodifiers = !if(!eq(p.NumSrcArgs, 0), 0, + !if(!eq(p.NumSrcArgs, 1), 0, + !if(p.HasModifiers, ?, 0))); + bits<1> src1_imodifiers = 0; bits<3> dst_sel = !if(p.HasDst, ?, 6); bits<2> dst_unused = !if(p.HasDst, ?, 2); bits<1> clamp = !if(p.HasModifiers, ?, 0); diff --git a/llvm/lib/Target/AMDGPU/VIInstrFormats.td b/llvm/lib/Target/AMDGPU/VIInstrFormats.td index 7fe3f370b30..e8216abd6ac 100644 --- a/llvm/lib/Target/AMDGPU/VIInstrFormats.td +++ b/llvm/lib/Target/AMDGPU/VIInstrFormats.td @@ -234,9 +234,11 @@ class VOP_SDWA <dag outs, dag ins, string asm, list<dag> pattern, bit HasMods = class VOP_SDWAe : Enc64 { bits<8> src0; bits<3> src0_sel; - bits<3> src0_modifiers; // {abs,neg,sext} + bits<2> src0_fmodifiers; // {abs,neg} + bits<1> src0_imodifiers; // sext bits<3> src1_sel; - bits<3> src1_modifiers; + bits<2> src1_fmodifiers; + bits<1> src1_imodifiers; bits<3> dst_sel; bits<2> dst_unused; bits<1> clamp; @@ -246,9 +248,11 @@ class VOP_SDWAe : Enc64 { let Inst{44-43} = dst_unused; let Inst{45} = clamp; let Inst{50-48} = src0_sel; - let Inst{53-51} = src0_modifiers; + let Inst{53-52} = src0_fmodifiers; + let Inst{51} = src0_imodifiers; let Inst{58-56} = src1_sel; - let Inst{61-59} = src1_modifiers; + let Inst{61-60} = src1_fmodifiers; + let Inst{59} = src1_imodifiers; } class VOP1_SDWAe <bits<8> op> : VOP_SDWAe { |