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| author | Jim Lin <tclin914@gmail.com> | 2019-04-10 01:56:32 +0000 | 
|---|---|---|
| committer | Jim Lin <tclin914@gmail.com> | 2019-04-10 01:56:32 +0000 | 
| commit | a49c95e02aac8189670afffaf33be47072eb7ac0 (patch) | |
| tree | 63fe025df16a62b51b892232a9412da2f795a21e /llvm/lib | |
| parent | 9ca3a95f79879468e3cb903a3947bcbe017e72ea (diff) | |
| download | bcm5719-llvm-a49c95e02aac8189670afffaf33be47072eb7ac0.tar.gz bcm5719-llvm-a49c95e02aac8189670afffaf33be47072eb7ac0.zip  | |
[Sparc] Fix incorrect MI insertion position for spilling f128.
Summary:
Obviously, new built MI (sethi+add or sethi+xor+add) for constructing large offset
should be inserted before new created MI for storing even register into memory.
So the insertion position should be *StMI instead of II.
before fixed:
std %f0, [%g1+80]
sethi 4, %g1        <<<
add %g1, %sp, %g1   <<< this two instructions should be put before "std %f0, [%g1+80]".
sethi 4, %g1
add %g1, %sp, %g1
std %f2, [%g1+88]
after fixed:
sethi 4, %g1
add %g1, %sp, %g1
std %f0, [%g1+80]
sethi 4, %g1
add %g1, %sp, %g1
std %f2, [%g1+88]
Reviewers: venkatra, jyknight
Reviewed By: jyknight
Subscribers: jyknight, fedor.sergeev, jrtc27, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60397
llvm-svn: 358042
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/Sparc/SparcRegisterInfo.cpp | 4 | 
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp b/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp index 9a3010639f2..beb8e2c1ff2 100644 --- a/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp +++ b/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp @@ -188,7 +188,7 @@ SparcRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,        MachineInstr *StMI =          BuildMI(*MI.getParent(), II, dl, TII.get(SP::STDFri))          .addReg(FrameReg).addImm(0).addReg(SrcEvenReg); -      replaceFI(MF, II, *StMI, dl, 0, Offset, FrameReg); +      replaceFI(MF, *StMI, *StMI, dl, 0, Offset, FrameReg);        MI.setDesc(TII.get(SP::STDFri));        MI.getOperand(2).setReg(SrcOddReg);        Offset += 8; @@ -200,7 +200,7 @@ SparcRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,        MachineInstr *StMI =          BuildMI(*MI.getParent(), II, dl, TII.get(SP::LDDFri), DestEvenReg)          .addReg(FrameReg).addImm(0); -      replaceFI(MF, II, *StMI, dl, 1, Offset, FrameReg); +      replaceFI(MF, *StMI, *StMI, dl, 1, Offset, FrameReg);        MI.setDesc(TII.get(SP::LDDFri));        MI.getOperand(0).setReg(DestOddReg);  | 

