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authorChris Lattner <sabre@nondot.org>2006-09-21 06:00:20 +0000
committerChris Lattner <sabre@nondot.org>2006-09-21 06:00:20 +0000
commita31f0a622b31ff11924192d19d0fe9422737af1d (patch)
tree2409a4e630cfb1a42c7be3c5666422fcbcdcc49f /llvm/lib
parent1c18c0db79e0a1d27482df3c7a898bc1257f3130 (diff)
downloadbcm5719-llvm-a31f0a622b31ff11924192d19d0fe9422737af1d.tar.gz
bcm5719-llvm-a31f0a622b31ff11924192d19d0fe9422737af1d.zip
Generalize (zext (truncate x)) and (sext (truncate x)) folding to work when
the src/dst are not the same size. This catches things like "truncate 32-bit X to 8 bits, then zext to 16", which happens a bit on X86. llvm-svn: 30557
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp33
1 files changed, 24 insertions, 9 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 43028a80c2e..045a61d7531 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -1766,12 +1766,18 @@ SDOperand DAGCombiner::visitSIGN_EXTEND(SDNode *N) {
if (N0.getOpcode() == ISD::SIGN_EXTEND || N0.getOpcode() == ISD::ANY_EXTEND)
return DAG.getNode(ISD::SIGN_EXTEND, VT, N0.getOperand(0));
- // fold (sext (truncate x)) -> (sextinreg x) iff x size == sext size.
- if (N0.getOpcode() == ISD::TRUNCATE && N0.getOperand(0).getValueType() == VT&&
- (!AfterLegalize ||
- TLI.isOperationLegal(ISD::SIGN_EXTEND_INREG, N0.getValueType())))
- return DAG.getNode(ISD::SIGN_EXTEND_INREG, VT, N0.getOperand(0),
+ // fold (sext (truncate x)) -> (sextinreg x).
+ if (N0.getOpcode() == ISD::TRUNCATE &&
+ (!AfterLegalize || TLI.isOperationLegal(ISD::SIGN_EXTEND_INREG, VT))) {
+ SDOperand Op = N0.getOperand(0);
+ if (Op.getValueType() < VT) {
+ Op = DAG.getNode(ISD::ANY_EXTEND, VT, Op);
+ } else if (Op.getValueType() > VT) {
+ Op = DAG.getNode(ISD::TRUNCATE, VT, Op);
+ }
+ return DAG.getNode(ISD::SIGN_EXTEND_INREG, VT, Op,
DAG.getValueType(N0.getValueType()));
+ }
// fold (sext (load x)) -> (sext (truncate (sextload x)))
if (N0.getOpcode() == ISD::LOAD && N0.hasOneUse() &&
@@ -1812,10 +1818,19 @@ SDOperand DAGCombiner::visitZERO_EXTEND(SDNode *N) {
// fold (zext (aext x)) -> (zext x)
if (N0.getOpcode() == ISD::ZERO_EXTEND || N0.getOpcode() == ISD::ANY_EXTEND)
return DAG.getNode(ISD::ZERO_EXTEND, VT, N0.getOperand(0));
- // fold (zext (truncate x)) -> (zextinreg x) iff x size == zext size.
- if (N0.getOpcode() == ISD::TRUNCATE && N0.getOperand(0).getValueType() == VT&&
- (!AfterLegalize || TLI.isOperationLegal(ISD::AND, N0.getValueType())))
- return DAG.getZeroExtendInReg(N0.getOperand(0), N0.getValueType());
+
+ // fold (zext (truncate x)) -> (and x, mask)
+ if (N0.getOpcode() == ISD::TRUNCATE &&
+ (!AfterLegalize || TLI.isOperationLegal(ISD::AND, VT))) {
+ SDOperand Op = N0.getOperand(0);
+ if (Op.getValueType() < VT) {
+ Op = DAG.getNode(ISD::ANY_EXTEND, VT, Op);
+ } else if (Op.getValueType() > VT) {
+ Op = DAG.getNode(ISD::TRUNCATE, VT, Op);
+ }
+ return DAG.getZeroExtendInReg(Op, N0.getValueType());
+ }
+
// fold (zext (load x)) -> (zext (truncate (zextload x)))
if (N0.getOpcode() == ISD::LOAD && N0.hasOneUse() &&
(!AfterLegalize||TLI.isOperationLegal(ISD::ZEXTLOAD, N0.getValueType()))){
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