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| author | Sander de Smalen <sander.desmalen@arm.com> | 2017-12-20 12:45:40 +0000 |
|---|---|---|
| committer | Sander de Smalen <sander.desmalen@arm.com> | 2017-12-20 12:45:40 +0000 |
| commit | a2f3bed64234bfdf5d2a17e569061c84082d630c (patch) | |
| tree | c9e9813725456692c5a08e387221cc63bcef9939 /llvm/lib | |
| parent | bd128fc5a5f87cc51555e52c06e0654451368f58 (diff) | |
| download | bcm5719-llvm-a2f3bed64234bfdf5d2a17e569061c84082d630c.tar.gz bcm5719-llvm-a2f3bed64234bfdf5d2a17e569061c84082d630c.zip | |
Trivial commit to force LLVM to run TableGen for Mips target after
a change to the AsmMatcherEmitter, and should fix the buildbot
failure on llvm-clang-x86_64-expensive-checks-win.
The issue is also described here:
http://lists.llvm.org/pipermail/llvm-dev/2017-December/119617.html
llvm-svn: 321170
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsRegisterInfo.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/MipsRegisterInfo.td b/llvm/lib/Target/Mips/MipsRegisterInfo.td index 50537bed8ff..c85ee20273c 100644 --- a/llvm/lib/Target/Mips/MipsRegisterInfo.td +++ b/llvm/lib/Target/Mips/MipsRegisterInfo.td @@ -38,7 +38,7 @@ class MipsRegWithSubRegs<bits<16> Enc, string n, list<Register> subregs> let Namespace = "Mips"; } -// Mips CPU Registers +// Mips CPU Registers. class MipsGPRReg<bits<16> Enc, string n> : MipsReg<Enc, n>; // Mips 64-bit CPU Registers |
