diff options
author | Alexey Samsonov <vonosmas@gmail.com> | 2014-08-27 19:36:53 +0000 |
---|---|---|
committer | Alexey Samsonov <vonosmas@gmail.com> | 2014-08-27 19:36:53 +0000 |
commit | a253bf9678290ef4940786288bdb7713b7bf14e7 (patch) | |
tree | 8cb9630d7cdb509941c685ac227b0a7f053bc751 /llvm/lib | |
parent | 925721572b939c8a0b9c35d367f0aa2bea607cfe (diff) | |
download | bcm5719-llvm-a253bf9678290ef4940786288bdb7713b7bf14e7.tar.gz bcm5719-llvm-a253bf9678290ef4940786288bdb7713b7bf14e7.zip |
Use BitVector instead of int in R600 SIISelLowering.
int may not have enough bits in it, which was detected by UBSan
bootstrap (it reported left shift by a too large constant).
llvm-svn: 216579
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/R600/SIISelLowering.cpp | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/llvm/lib/Target/R600/SIISelLowering.cpp b/llvm/lib/Target/R600/SIISelLowering.cpp index 67f566f019d..c72d6174e6e 100644 --- a/llvm/lib/Target/R600/SIISelLowering.cpp +++ b/llvm/lib/Target/R600/SIISelLowering.cpp @@ -25,6 +25,7 @@ #include "SIInstrInfo.h" #include "SIMachineFunctionInfo.h" #include "SIRegisterInfo.h" +#include "llvm/ADT/BitVector.h" #include "llvm/CodeGen/CallingConvLower.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineRegisterInfo.h" @@ -411,7 +412,7 @@ SDValue SITargetLowering::LowerFormalArguments( assert(CallConv == CallingConv::C); SmallVector<ISD::InputArg, 16> Splits; - uint32_t Skipped = 0; + BitVector Skipped(Ins.size()); for (unsigned i = 0, e = Ins.size(), PSInputNum = 0; i != e; ++i) { const ISD::InputArg &Arg = Ins[i]; @@ -424,7 +425,7 @@ SDValue SITargetLowering::LowerFormalArguments( if (!Arg.Used) { // We can savely skip PS inputs - Skipped |= 1 << i; + Skipped.set(i); ++PSInputNum; continue; } @@ -488,7 +489,7 @@ SDValue SITargetLowering::LowerFormalArguments( for (unsigned i = 0, e = Ins.size(), ArgIdx = 0; i != e; ++i) { const ISD::InputArg &Arg = Ins[i]; - if (Skipped & (1 << i)) { + if (Skipped[i]) { InVals.push_back(DAG.getUNDEF(Arg.VT)); continue; } |