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| author | Sanjay Patel <spatel@rotateright.com> | 2015-09-30 22:25:55 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2015-09-30 22:25:55 +0000 |
| commit | a114a10bbe7c494fb413769c935fdab23f2ebe58 (patch) | |
| tree | 6d5f04303d86080313295a1b3140b5bede97be84 /llvm/lib | |
| parent | 3287d7a6edfae83c27b985dc7fbc25c95c6c65b3 (diff) | |
| download | bcm5719-llvm-a114a10bbe7c494fb413769c935fdab23f2ebe58.tar.gz bcm5719-llvm-a114a10bbe7c494fb413769c935fdab23f2ebe58.zip | |
[x86] enable machine combiner reassociations for 256-bit vector logical integer insts
llvm-svn: 248955
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index 4a8bedceb49..71b5ab4770a 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -6373,8 +6373,11 @@ bool X86InstrInfo::isAssociativeAndCommutative(const MachineInstr &Inst) const { case X86::PORrr: case X86::PXORrr: case X86::VPANDrr: + case X86::VPANDYrr: case X86::VPORrr: + case X86::VPORYrr: case X86::VPXORrr: + case X86::VPXORYrr: // Normal min/max instructions are not commutative because of NaN and signed // zero semantics, but these are. Thus, there's no need to check for global // relaxed math; the instructions themselves have the properties we need. |
