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authorMatt Arsenault <Matthew.Arsenault@amd.com>2014-03-06 17:34:03 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2014-03-06 17:34:03 +0000
commit9fe669c52262e16afaabe490de44d198a46aa512 (patch)
tree58da13eb3b0f5a5062d784e6bb6cd15dbbef7ef7 /llvm/lib
parente6ed1d796fbc405ab41cb3529fd0ffc595486c62 (diff)
downloadbcm5719-llvm-9fe669c52262e16afaabe490de44d198a46aa512.tar.gz
bcm5719-llvm-9fe669c52262e16afaabe490de44d198a46aa512.zip
R600/SI: Expand selects on vectors.
llvm-svn: 203134
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/R600/AMDGPUISelLowering.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp
index 8d4895267bb..9978493b4d1 100644
--- a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp
+++ b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp
@@ -181,6 +181,7 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) :
setOperationAction(ISD::UDIV, VT, Expand);
setOperationAction(ISD::UINT_TO_FP, VT, Expand);
setOperationAction(ISD::UREM, VT, Expand);
+ setOperationAction(ISD::SELECT, VT, Expand);
setOperationAction(ISD::VSELECT, VT, Expand);
setOperationAction(ISD::XOR, VT, Expand);
}
@@ -202,6 +203,7 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) :
setOperationAction(ISD::FRINT, VT, Expand);
setOperationAction(ISD::FSQRT, VT, Expand);
setOperationAction(ISD::FSUB, VT, Expand);
+ setOperationAction(ISD::SELECT, VT, Expand);
}
}
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