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authorCraig Topper <craig.topper@gmail.com>2012-05-23 03:59:53 +0000
committerCraig Topper <craig.topper@gmail.com>2012-05-23 03:59:53 +0000
commit9fc5c814fa5f3804cb8748f355276ac0b1b4e0a4 (patch)
tree07e8c84ac52f5bc4d08305562a20eedb13f4ef1b /llvm/lib
parent607d631d6474d947b72a4700eed6704018ae2cfc (diff)
downloadbcm5719-llvm-9fc5c814fa5f3804cb8748f355276ac0b1b4e0a4.tar.gz
bcm5719-llvm-9fc5c814fa5f3804cb8748f355276ac0b1b4e0a4.zip
Fix indentation of wrapped line for readability. No functional change.
llvm-svn: 157309
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86CodeEmitter.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86CodeEmitter.cpp b/llvm/lib/Target/X86/X86CodeEmitter.cpp
index fa31265b106..40fe395092f 100644
--- a/llvm/lib/Target/X86/X86CodeEmitter.cpp
+++ b/llvm/lib/Target/X86/X86CodeEmitter.cpp
@@ -171,7 +171,7 @@ static unsigned determineREX(const MachineInstr &MI) {
unsigned NumOps = Desc.getNumOperands();
if (NumOps) {
bool isTwoAddr = NumOps > 1 &&
- Desc.getOperandConstraint(1, MCOI::TIED_TO) != -1;
+ Desc.getOperandConstraint(1, MCOI::TIED_TO) != -1;
// If it accesses SPL, BPL, SIL, or DIL, then it requires a 0x40 REX prefix.
unsigned i = isTwoAddr ? 1 : 0;
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