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| author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2018-12-10 21:56:04 +0000 |
|---|---|---|
| committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2018-12-10 21:56:04 +0000 |
| commit | 9f003f9262cd5a9e2ceb360f905782ed2bdc483f (patch) | |
| tree | 7114783b0b288a519de9b34324354df2613af5d6 /llvm/lib | |
| parent | 9ccde61f8182d53d8aad74ef60e8c72bc2213e64 (diff) | |
| download | bcm5719-llvm-9f003f9262cd5a9e2ceb360f905782ed2bdc483f.tar.gz bcm5719-llvm-9f003f9262cd5a9e2ceb360f905782ed2bdc483f.zip | |
[Hexagon] Couple of fixes in optimize addressing mode
- Check if an operand is an immediate before calling getImm. Some operands
that take constant values can actually have global symbols or other
constant expressions.
- When a load-constant instruction can be folded into users, make sure to
only delete it when all users have been successfully converted.
llvm-svn: 348802
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp | 37 |
1 files changed, 21 insertions, 16 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp b/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp index 29c044b3b72..c3a5bd5d57b 100644 --- a/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp +++ b/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp @@ -502,7 +502,8 @@ bool HexagonOptAddrMode::changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, MIB.add(ImmOp); OpStart = 4; Changed = true; - } else if (HII->getAddrMode(*OldMI) == HexagonII::BaseImmOffset) { + } else if (HII->getAddrMode(*OldMI) == HexagonII::BaseImmOffset && + OldMI->getOperand(2).isImm()) { short NewOpCode = HII->changeAddrMode_io_abs(*OldMI); assert(NewOpCode >= 0 && "Invalid New opcode\n"); MIB = BuildMI(*BB, InsertPt, OldMI->getDebugLoc(), HII->get(NewOpCode)) @@ -518,17 +519,19 @@ bool HexagonOptAddrMode::changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, LLVM_DEBUG(dbgs() << "[Changing]: " << *OldMI << "\n"); LLVM_DEBUG(dbgs() << "[TO]: " << *MIB << "\n"); - } else if (ImmOpNum == 2 && OldMI->getOperand(3).getImm() == 0) { - short NewOpCode = HII->changeAddrMode_rr_io(*OldMI); - assert(NewOpCode >= 0 && "Invalid New opcode\n"); - MIB = BuildMI(*BB, InsertPt, OldMI->getDebugLoc(), HII->get(NewOpCode)); - MIB.add(OldMI->getOperand(0)); - MIB.add(OldMI->getOperand(1)); - MIB.add(ImmOp); - OpStart = 4; - Changed = true; - LLVM_DEBUG(dbgs() << "[Changing]: " << *OldMI << "\n"); - LLVM_DEBUG(dbgs() << "[TO]: " << *MIB << "\n"); + } else if (ImmOpNum == 2) { + if (OldMI->getOperand(3).isImm() && OldMI->getOperand(3).getImm() == 0) { + short NewOpCode = HII->changeAddrMode_rr_io(*OldMI); + assert(NewOpCode >= 0 && "Invalid New opcode\n"); + MIB = BuildMI(*BB, InsertPt, OldMI->getDebugLoc(), HII->get(NewOpCode)); + MIB.add(OldMI->getOperand(0)); + MIB.add(OldMI->getOperand(1)); + MIB.add(ImmOp); + OpStart = 4; + Changed = true; + LLVM_DEBUG(dbgs() << "[Changing]: " << *OldMI << "\n"); + LLVM_DEBUG(dbgs() << "[TO]: " << *MIB << "\n"); + } } if (Changed) @@ -758,11 +761,13 @@ bool HexagonOptAddrMode::processBlock(NodeAddr<BlockNode *> BA) { // This could happen, for example, when DefR = R4, but the used // register is D2. + // Change UseMI if replacement is possible. If any replacement failed, + // or wasn't attempted, make sure to keep the TFR. + bool Xformed = false; if (UseMOnum >= 0 && InstrEvalResult[UseMI]) - // Change UseMI if replacement is possible. - Changed |= xformUseMI(MI, UseMI, UseN, UseMOnum); - else - KeepTfr = true; + Xformed = xformUseMI(MI, UseMI, UseN, UseMOnum); + Changed |= Xformed; + KeepTfr |= !Xformed; } if (!KeepTfr) Deleted.insert(MI); |

