summaryrefslogtreecommitdiffstats
path: root/llvm/lib
diff options
context:
space:
mode:
authorBill Schmidt <wschmidt@linux.vnet.ibm.com>2012-12-13 20:57:10 +0000
committerBill Schmidt <wschmidt@linux.vnet.ibm.com>2012-12-13 20:57:10 +0000
commit9ed4dbcb755281d16856dc2eef1326c18cace0b7 (patch)
tree1d6989a83a2bbdd33b4a2e304b58d91f204370ac /llvm/lib
parent13abe5ec3c8ff646352289370e0fa84bacce37c7 (diff)
downloadbcm5719-llvm-9ed4dbcb755281d16856dc2eef1326c18cace0b7.tar.gz
bcm5719-llvm-9ed4dbcb755281d16856dc2eef1326c18cace0b7.zip
This is another cleanup patch for 64-bit PowerPC TLS processing. I had
some hackery in place that hid my poor use of TblGen, which I've now sorted out and cleaned up. No change in observable behavior, so no new test cases. llvm-svn: 170149
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp47
-rw-r--r--llvm/lib/Target/PowerPC/PPCISelLowering.cpp2
-rw-r--r--llvm/lib/Target/PowerPC/PPCInstr64Bit.td19
3 files changed, 11 insertions, 57 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 806c4449270..c7c265ce783 100644
--- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -1311,53 +1311,6 @@ SDNode *PPCDAGToDAGISel::Select(SDNode *N) {
return CurDAG->getMachineNode(PPC::ADDItocL, dl, MVT::i64,
SDValue(Tmp, 0), GA);
}
- case PPCISD::LD_GOT_TPREL: {
- assert (PPCSubTarget.isPPC64() && "Only supported for 64-bit ABI");
- return CurDAG->getMachineNode(PPC::LDgotTPREL, dl, MVT::i64,
- N->getOperand(0), N->getOperand(1));
- }
- // FIXME: Try without these. Doesn't seem necessary.
- case PPCISD::ADDIS_TLSGD_HA: {
- assert (PPCSubTarget.isPPC64() && "Only supported for 64-bit ABI");
- return CurDAG->getMachineNode(PPC::ADDIStlsgdHA, dl, MVT::i64,
- N->getOperand(0), N->getOperand(1));
- }
- case PPCISD::ADDI_TLSGD_L: {
- assert (PPCSubTarget.isPPC64() && "Only supported for 64-bit ABI");
- return CurDAG->getMachineNode(PPC::ADDItlsgdL, dl, MVT::i64,
- N->getOperand(0), N->getOperand(1));
- }
- case PPCISD::GET_TLS_ADDR: {
- assert (PPCSubTarget.isPPC64() && "Only supported for 64-bit ABI");
- return CurDAG->getMachineNode(PPC::GETtlsADDR, dl, MVT::i64,
- N->getOperand(0), N->getOperand(1));
- }
- case PPCISD::ADDIS_TLSLD_HA: {
- assert (PPCSubTarget.isPPC64() && "Only supported for 64-bit ABI");
- return CurDAG->getMachineNode(PPC::ADDIStlsldHA, dl, MVT::i64,
- N->getOperand(0), N->getOperand(1));
- }
- case PPCISD::ADDI_TLSLD_L: {
- assert (PPCSubTarget.isPPC64() && "Only supported for 64-bit ABI");
- return CurDAG->getMachineNode(PPC::ADDItlsldL, dl, MVT::i64,
- N->getOperand(0), N->getOperand(1));
- }
- case PPCISD::GET_TLSLD_ADDR: {
- assert (PPCSubTarget.isPPC64() && "Only supported for 64-bit ABI");
- return CurDAG->getMachineNode(PPC::GETtlsldADDR, dl, MVT::i64,
- N->getOperand(0), N->getOperand(1));
- }
- case PPCISD::ADDIS_DTPREL_HA: {
- assert (PPCSubTarget.isPPC64() && "Only supported for 64-bit ABI");
- return CurDAG->getMachineNode(PPC::ADDISdtprelHA, dl, MVT::i64,
- N->getOperand(0), N->getOperand(1),
- N->getOperand(2));
- }
- case PPCISD::ADDI_DTPREL_L: {
- assert (PPCSubTarget.isPPC64() && "Only supported for 64-bit ABI");
- return CurDAG->getMachineNode(PPC::ADDIdtprelL, dl, MVT::i64,
- N->getOperand(0), N->getOperand(1));
- }
}
return SelectCode(N);
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 0748bd53a8c..110ed6ef110 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -1402,7 +1402,7 @@ SDValue PPCTargetLowering::LowerGlobalTLSAddress(SDValue Op,
// copies dissolve during subsequent transforms.
Chain = DAG.getCopyToReg(Chain, dl, PPC::X3, TLSAddr);
SDValue DtvOffsetHi = DAG.getNode(PPCISD::ADDIS_DTPREL_HA, dl, PtrVT,
- ParmReg, TGA, Chain);
+ Chain, ParmReg, TGA);
return DAG.getNode(PPCISD::ADDI_DTPREL_L, dl, PtrVT, DtvOffsetHi, TGA);
}
diff --git a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
index 429c60b742a..06520b19f9a 100644
--- a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
+++ b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
@@ -723,49 +723,50 @@ def ADDItocL: Pseudo<(outs G8RC:$rD), (ins G8RC:$reg, tocentry:$disp),
def LDgotTPREL: Pseudo<(outs G8RC:$rD), (ins tlsaddr:$disp, G8RC:$reg),
"#LDgotTPREL",
[(set G8RC:$rD,
- (PPCldGotTprel G8RC:$reg, tglobaltlsaddr:$disp))]>,
+ (PPCldGotTprel tglobaltlsaddr:$disp, G8RC:$reg))]>,
isPPC64;
def : Pat<(PPCaddTls G8RC:$in, tglobaltlsaddr:$g),
(ADD8TLS G8RC:$in, tglobaltlsaddr:$g)>;
def ADDIStlsgdHA: Pseudo<(outs G8RC:$rD), (ins G8RC:$reg, symbolHi64:$disp),
"#ADDIStlsgdHA",
[(set G8RC:$rD,
- (PPCaddisTlsgdHA G8RC:$reg, tglobaladdr:$disp))]>,
+ (PPCaddisTlsgdHA G8RC:$reg, tglobaltlsaddr:$disp))]>,
isPPC64;
def ADDItlsgdL : Pseudo<(outs G8RC:$rD), (ins G8RC:$reg, symbolLo64:$disp),
"#ADDItlsgdL",
[(set G8RC:$rD,
- (PPCaddiTlsgdL G8RC:$reg, tglobaladdr:$disp))]>,
+ (PPCaddiTlsgdL G8RC:$reg, tglobaltlsaddr:$disp))]>,
isPPC64;
def GETtlsADDR : Pseudo<(outs G8RC:$rD), (ins G8RC:$reg, tlsgd:$sym),
"#GETtlsADDR",
[(set G8RC:$rD,
- (PPCgetTlsAddr G8RC:$reg, tglobaladdr:$sym))]>,
+ (PPCgetTlsAddr G8RC:$reg, tglobaltlsaddr:$sym))]>,
isPPC64;
def ADDIStlsldHA: Pseudo<(outs G8RC:$rD), (ins G8RC:$reg, symbolHi64:$disp),
"#ADDIStlsldHA",
[(set G8RC:$rD,
- (PPCaddisTlsldHA G8RC:$reg, tglobaladdr:$disp))]>,
+ (PPCaddisTlsldHA G8RC:$reg, tglobaltlsaddr:$disp))]>,
isPPC64;
def ADDItlsldL : Pseudo<(outs G8RC:$rD), (ins G8RC:$reg, symbolLo64:$disp),
"#ADDItlsldL",
[(set G8RC:$rD,
- (PPCaddiTlsldL G8RC:$reg, tglobaladdr:$disp))]>,
+ (PPCaddiTlsldL G8RC:$reg, tglobaltlsaddr:$disp))]>,
isPPC64;
def GETtlsldADDR : Pseudo<(outs G8RC:$rD), (ins G8RC:$reg, tlsgd:$sym),
"#GETtlsldADDR",
[(set G8RC:$rD,
- (PPCgetTlsldAddr G8RC:$reg, tglobaladdr:$sym))]>,
+ (PPCgetTlsldAddr G8RC:$reg, tglobaltlsaddr:$sym))]>,
isPPC64;
def ADDISdtprelHA: Pseudo<(outs G8RC:$rD), (ins G8RC:$reg, symbolHi64:$disp),
"#ADDISdtprelHA",
[(set G8RC:$rD,
- (PPCaddisDtprelHA G8RC:$reg, tglobaladdr:$disp))]>,
+ (PPCaddisDtprelHA G8RC:$reg,
+ tglobaltlsaddr:$disp))]>,
isPPC64;
def ADDIdtprelL : Pseudo<(outs G8RC:$rD), (ins G8RC:$reg, symbolLo64:$disp),
"#ADDIdtprelL",
[(set G8RC:$rD,
- (PPCaddiDtprelL G8RC:$reg, tglobaladdr:$disp))]>,
+ (PPCaddiDtprelL G8RC:$reg, tglobaltlsaddr:$disp))]>,
isPPC64;
let PPC970_Unit = 2 in {
OpenPOWER on IntegriCloud