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| author | Akira Hatanaka <ahatanak@gmail.com> | 2011-09-09 21:31:46 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanak@gmail.com> | 2011-09-09 21:31:46 +0000 |
| commit | 9d5f9278e3777b35f700bacfc59dcd70ca5036fd (patch) | |
| tree | 9757f1a0428d7a41a5cb89595c373952382c8530 /llvm/lib | |
| parent | 6422642a1db8778b7b3c1b4c3ce0d1dc06f1d7e0 (diff) | |
| download | bcm5719-llvm-9d5f9278e3777b35f700bacfc59dcd70ca5036fd.tar.gz bcm5719-llvm-9d5f9278e3777b35f700bacfc59dcd70ca5036fd.zip | |
Mips32 does not reserve even-numbered floating point registers.
llvm-svn: 139412
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsRegisterInfo.cpp | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/llvm/lib/Target/Mips/MipsRegisterInfo.cpp b/llvm/lib/Target/Mips/MipsRegisterInfo.cpp index 94e84d764de..c12b3560ee6 100644 --- a/llvm/lib/Target/Mips/MipsRegisterInfo.cpp +++ b/llvm/lib/Target/Mips/MipsRegisterInfo.cpp @@ -132,11 +132,6 @@ getReservedRegs(const MachineFunction &MF) const { Reserved.set(Mips::F31); Reserved.set(Mips::D15); - // SRV4 requires that odd register can't be used. - if (!Subtarget.isSingleFloat() && !Subtarget.isMips32()) - for (unsigned FReg=(Mips::F0)+1; FReg < Mips::F30; FReg+=2) - Reserved.set(FReg); - return Reserved; } |
