diff options
author | Craig Topper <craig.topper@gmail.com> | 2020-01-11 11:06:52 -0800 |
---|---|---|
committer | Craig Topper <craig.topper@gmail.com> | 2020-01-11 11:06:52 -0800 |
commit | 9cc9120969fd9f7f6a99321c7d94133a32927a3a (patch) | |
tree | 88dc5d1d260a68019136eac2590eaae497c43b42 /llvm/lib | |
parent | dc422e968e73790178e500f506e8fb7cfa1e62ea (diff) | |
download | bcm5719-llvm-9cc9120969fd9f7f6a99321c7d94133a32927a3a.tar.gz bcm5719-llvm-9cc9120969fd9f7f6a99321c7d94133a32927a3a.zip |
[X86] Turn FP_ROUND/STRICT_FP_ROUND into X86ISD::VFPROUND/STRICT_VFPROUND during PreprocessISelDAG to remove some duplicate isel patterns.
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 4 | ||||
-rw-r--r-- | llvm/lib/Target/X86/X86InstrAVX512.td | 60 | ||||
-rw-r--r-- | llvm/lib/Target/X86/X86InstrSSE.td | 7 |
3 files changed, 4 insertions, 67 deletions
diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp index 8ea4ad86ef3..bf33f399db2 100644 --- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -816,6 +816,8 @@ void X86DAGToDAGISel::PreprocessISelDAG() { } switch (N->getOpcode()) { + case ISD::FP_ROUND: + case ISD::STRICT_FP_ROUND: case ISD::FP_TO_SINT: case ISD::FP_TO_UINT: case ISD::STRICT_FP_TO_SINT: @@ -828,6 +830,8 @@ void X86DAGToDAGISel::PreprocessISelDAG() { unsigned NewOpc; switch (N->getOpcode()) { default: llvm_unreachable("Unexpected opcode!"); + case ISD::FP_ROUND: NewOpc = X86ISD::VFPROUND; break; + case ISD::STRICT_FP_ROUND: NewOpc = X86ISD::STRICT_VFPROUND; break; case ISD::STRICT_FP_TO_SINT: NewOpc = X86ISD::STRICT_CVTTP2SI; break; case ISD::FP_TO_SINT: NewOpc = X86ISD::CVTTP2SI; break; case ISD::STRICT_FP_TO_UINT: NewOpc = X86ISD::STRICT_CVTTP2UI; break; diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td index ebb22ec270e..32f012033fb 100644 --- a/llvm/lib/Target/X86/X86InstrAVX512.td +++ b/llvm/lib/Target/X86/X86InstrAVX512.td @@ -7667,67 +7667,7 @@ defm VCVTPD2PS : avx512_cvtpd2ps<0x5A, "vcvtpd2ps", SchedWriteCvtPD2PS>, defm VCVTPS2PD : avx512_cvtps2pd<0x5A, "vcvtps2pd", SchedWriteCvtPS2PD>, PS, EVEX_CD8<32, CD8VH>; -let Predicates = [HasAVX512] in { - def : Pat<(v8f32 (any_fpround (v8f64 VR512:$src))), - (VCVTPD2PSZrr VR512:$src)>; - def : Pat<(vselect VK8WM:$mask, (v8f32 (any_fpround (v8f64 VR512:$src))), - VR256X:$src0), - (VCVTPD2PSZrrk VR256X:$src0, VK8WM:$mask, VR512:$src)>; - def : Pat<(vselect VK8WM:$mask, (v8f32 (any_fpround (v8f64 VR512:$src))), - v8f32x_info.ImmAllZerosV), - (VCVTPD2PSZrrkz VK8WM:$mask, VR512:$src)>; - - def : Pat<(v8f32 (any_fpround (loadv8f64 addr:$src))), - (VCVTPD2PSZrm addr:$src)>; - def : Pat<(vselect VK8WM:$mask, (v8f32 (any_fpround (loadv8f64 addr:$src))), - VR256X:$src0), - (VCVTPD2PSZrmk VR256X:$src0, VK8WM:$mask, addr:$src)>; - def : Pat<(vselect VK8WM:$mask, (v8f32 (any_fpround (loadv8f64 addr:$src))), - v8f32x_info.ImmAllZerosV), - (VCVTPD2PSZrmkz VK8WM:$mask, addr:$src)>; - - def : Pat<(v8f32 (any_fpround (v8f64 (X86VBroadcastld64 addr:$src)))), - (VCVTPD2PSZrmb addr:$src)>; - def : Pat<(vselect VK8WM:$mask, - (any_fpround (v8f64 (X86VBroadcastld64 addr:$src))), - (v8f32 VR256X:$src0)), - (VCVTPD2PSZrmbk VR256X:$src0, VK8WM:$mask, addr:$src)>; - def : Pat<(vselect VK8WM:$mask, - (any_fpround (v8f64 (X86VBroadcastld64 addr:$src))), - v8f32x_info.ImmAllZerosV), - (VCVTPD2PSZrmbkz VK8WM:$mask, addr:$src)>; -} - let Predicates = [HasVLX] in { - def : Pat<(v4f32 (any_fpround (v4f64 VR256X:$src))), - (VCVTPD2PSZ256rr VR256X:$src)>; - def : Pat<(vselect VK4WM:$mask, (v4f32 (any_fpround (v4f64 VR256X:$src))), - VR128X:$src0), - (VCVTPD2PSZ256rrk VR128X:$src0, VK4WM:$mask, VR256X:$src)>; - def : Pat<(vselect VK4WM:$mask, (v4f32 (any_fpround (v4f64 VR256X:$src))), - v4f32x_info.ImmAllZerosV), - (VCVTPD2PSZ256rrkz VK4WM:$mask, VR256X:$src)>; - - def : Pat<(v4f32 (any_fpround (loadv4f64 addr:$src))), - (VCVTPD2PSZ256rm addr:$src)>; - def : Pat<(vselect VK4WM:$mask, (v4f32 (any_fpround (loadv4f64 addr:$src))), - VR128X:$src0), - (VCVTPD2PSZ256rmk VR128X:$src0, VK4WM:$mask, addr:$src)>; - def : Pat<(vselect VK4WM:$mask, (v4f32 (any_fpround (loadv4f64 addr:$src))), - v4f32x_info.ImmAllZerosV), - (VCVTPD2PSZ256rmkz VK4WM:$mask, addr:$src)>; - - def : Pat<(v4f32 (any_fpround (v4f64 (X86VBroadcastld64 addr:$src)))), - (VCVTPD2PSZ256rmb addr:$src)>; - def : Pat<(vselect VK4WM:$mask, - (v4f32 (any_fpround (v4f64 (X86VBroadcastld64 addr:$src)))), - VR128X:$src0), - (VCVTPD2PSZ256rmbk VR128X:$src0, VK4WM:$mask, addr:$src)>; - def : Pat<(vselect VK4WM:$mask, - (v4f32 (any_fpround (v4f64 (X86VBroadcastld64 addr:$src)))), - v4f32x_info.ImmAllZerosV), - (VCVTPD2PSZ256rmbkz VK4WM:$mask, addr:$src)>; - // Special patterns to allow use of X86vmfpround for masking. Instruction // patterns have been disabled with null_frag. def : Pat<(X86any_vfpround (v2f64 VR128X:$src)), diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index 27f1e90c067..c45f342ed75 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -1739,13 +1739,6 @@ def CVTPD2PSrm : PDI<0x5A, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), [(set VR128:$dst, (X86any_vfpround (memopv2f64 addr:$src)))]>, Sched<[WriteCvtPD2PS.Folded]>, SIMD_EXC; -let Predicates = [HasAVX, NoVLX] in { - def : Pat<(v4f32 (any_fpround (v4f64 VR256:$src))), - (VCVTPD2PSYrr VR256:$src)>; - def : Pat<(v4f32 (any_fpround (loadv4f64 addr:$src))), - (VCVTPD2PSYrm addr:$src)>; -} - //===----------------------------------------------------------------------===// // SSE 1 & 2 - Compare Instructions //===----------------------------------------------------------------------===// |