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author | Sanjay Patel <spatel@rotateright.com> | 2016-07-06 16:42:46 +0000 |
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committer | Sanjay Patel <spatel@rotateright.com> | 2016-07-06 16:42:46 +0000 |
commit | 9cc21ac41218e433dea725c5399de58c7c4819d2 (patch) | |
tree | 91f9a13de0719621896d47d596cfcb5a990327b3 /llvm/lib | |
parent | dba6503a9be78f0f1ff140220b9c4bf684de69d4 (diff) | |
download | bcm5719-llvm-9cc21ac41218e433dea725c5399de58c7c4819d2.tar.gz bcm5719-llvm-9cc21ac41218e433dea725c5399de58c7c4819d2.zip |
fix typo; NFC
llvm-svn: 274636
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 8da29396b71..7a2bdec5479 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -2269,7 +2269,7 @@ SDValue PPCTargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const { } // If we're comparing for equality to zero, expose the fact that this is - // implented as a ctlz/srl pair on ppc, so that the dag combiner can + // implemented as a ctlz/srl pair on ppc, so that the dag combiner can // fold the new nodes. if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { if (C->isNullValue() && CC == ISD::SETEQ) { |