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author | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2018-03-16 15:40:27 +0000 |
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committer | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2018-03-16 15:40:27 +0000 |
commit | 9c1a6e7e24272aefc2ae2182ce24e9c4e1cded42 (patch) | |
tree | 94a3fbd2f62beb1e2b63870c29696ff596c05edf /llvm/lib | |
parent | bf0ed8e9b8f86509e099f998837314e8fef4dd06 (diff) | |
download | bcm5719-llvm-9c1a6e7e24272aefc2ae2182ce24e9c4e1cded42.tar.gz bcm5719-llvm-9c1a6e7e24272aefc2ae2182ce24e9c4e1cded42.zip |
[AMDGPU][MC] Corrected default values for unused SDWA operands
See bug 36355: https://bugs.llvm.org/show_bug.cgi?id=36355
Differential Revision: https://reviews.llvm.org/D44481
Reviewers: artem.tamazov, arsenm
llvm-svn: 327720
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/AMDGPU/VOPCInstructions.td | 4 | ||||
-rw-r--r-- | llvm/lib/Target/AMDGPU/VOPInstructions.td | 16 |
2 files changed, 10 insertions, 10 deletions
diff --git a/llvm/lib/Target/AMDGPU/VOPCInstructions.td b/llvm/lib/Target/AMDGPU/VOPCInstructions.td index f8879d6bd8f..cc6b8116afe 100644 --- a/llvm/lib/Target/AMDGPU/VOPCInstructions.td +++ b/llvm/lib/Target/AMDGPU/VOPCInstructions.td @@ -30,8 +30,8 @@ class VOPC_SDWAe <bits<8> op, VOPProfile P> : VOP_SDWAe <P> { let Inst{31-25} = 0x3e; // encoding // VOPC disallows dst_sel and dst_unused as they have no effect on destination - let Inst{42-40} = SDWA.DWORD; - let Inst{44-43} = SDWA.UNUSED_PRESERVE; + let Inst{42-40} = 0; + let Inst{44-43} = 0; } class VOPC_SDWA9e <bits<8> op, VOPProfile P> : VOP_SDWA9Be <P> { diff --git a/llvm/lib/Target/AMDGPU/VOPInstructions.td b/llvm/lib/Target/AMDGPU/VOPInstructions.td index 520d5dd0f50..21cad2a59e7 100644 --- a/llvm/lib/Target/AMDGPU/VOPInstructions.td +++ b/llvm/lib/Target/AMDGPU/VOPInstructions.td @@ -325,13 +325,13 @@ class VOP_SDWAe<VOPProfile P> : Enc64 { bits<1> clamp; let Inst{39-32} = !if(P.HasSrc0, src0{7-0}, 0); - let Inst{42-40} = !if(P.EmitDst, dst_sel{2-0}, SDWA.DWORD); - let Inst{44-43} = !if(P.EmitDst, dst_unused{1-0}, SDWA.UNUSED_PRESERVE); + let Inst{42-40} = !if(P.EmitDst, dst_sel{2-0}, 0); + let Inst{44-43} = !if(P.EmitDst, dst_unused{1-0}, 0); let Inst{45} = !if(P.HasSDWAClamp, clamp{0}, 0); - let Inst{50-48} = !if(P.HasSrc0, src0_sel{2-0}, SDWA.DWORD); + let Inst{50-48} = !if(P.HasSrc0, src0_sel{2-0}, 0); let Inst{51} = !if(P.HasSrc0IntMods, src0_modifiers{0}, 0); let Inst{53-52} = !if(P.HasSrc0FloatMods, src0_modifiers{1-0}, 0); - let Inst{58-56} = !if(P.HasSrc1, src1_sel{2-0}, SDWA.DWORD); + let Inst{58-56} = !if(P.HasSrc1, src1_sel{2-0}, 0); let Inst{59} = !if(P.HasSrc1IntMods, src1_modifiers{0}, 0); let Inst{61-60} = !if(P.HasSrc1FloatMods, src1_modifiers{1-0}, 0); } @@ -359,11 +359,11 @@ class VOP_SDWA9e<VOPProfile P> : Enc64 { bits<1> src1_sgpr; let Inst{39-32} = !if(P.HasSrc0, src0{7-0}, 0); - let Inst{50-48} = !if(P.HasSrc0, src0_sel{2-0}, SDWA.DWORD); + let Inst{50-48} = !if(P.HasSrc0, src0_sel{2-0}, 0); let Inst{51} = !if(P.HasSrc0IntMods, src0_modifiers{0}, 0); let Inst{53-52} = !if(P.HasSrc0FloatMods, src0_modifiers{1-0}, 0); let Inst{55} = !if(P.HasSrc0, src0{8}, 0); - let Inst{58-56} = !if(P.HasSrc1, src1_sel{2-0}, SDWA.DWORD); + let Inst{58-56} = !if(P.HasSrc1, src1_sel{2-0}, 0); let Inst{59} = !if(P.HasSrc1IntMods, src1_modifiers{0}, 0); let Inst{61-60} = !if(P.HasSrc1FloatMods, src1_modifiers{1-0}, 0); let Inst{63} = 0; // src1_sgpr - should be specified in subclass @@ -376,8 +376,8 @@ class VOP_SDWA9Ae<VOPProfile P> : VOP_SDWA9e<P> { bits<1> clamp; bits<2> omod; - let Inst{42-40} = !if(P.EmitDst, dst_sel{2-0}, SDWA.DWORD); - let Inst{44-43} = !if(P.EmitDst, dst_unused{1-0}, SDWA.UNUSED_PRESERVE); + let Inst{42-40} = !if(P.EmitDst, dst_sel{2-0}, 0); + let Inst{44-43} = !if(P.EmitDst, dst_unused{1-0}, 0); let Inst{45} = !if(P.HasSDWAClamp, clamp{0}, 0); let Inst{47-46} = !if(P.HasSDWAOMod, omod{1-0}, 0); } |