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| author | Craig Topper <craig.topper@intel.com> | 2017-11-21 18:50:41 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-11-21 18:50:41 +0000 |
| commit | 9b03f67f9a457942385ae4af457ded63d2cf15ea (patch) | |
| tree | a491617db0cae1c517a24a1e796e6b9f5a7e03f0 /llvm/lib | |
| parent | 40f191f724d2fcf3f69efa71093e7a029cbf7476 (diff) | |
| download | bcm5719-llvm-9b03f67f9a457942385ae4af457ded63d2cf15ea.tar.gz bcm5719-llvm-9b03f67f9a457942385ae4af457ded63d2cf15ea.zip | |
[X86] Sort bits in getHostCPUFeatures again.
llvm-svn: 318792
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Support/Host.cpp | 16 |
1 files changed, 5 insertions, 11 deletions
diff --git a/llvm/lib/Support/Host.cpp b/llvm/lib/Support/Host.cpp index d7b1ad911f8..3870a5876b7 100644 --- a/llvm/lib/Support/Host.cpp +++ b/llvm/lib/Support/Host.cpp @@ -1258,19 +1258,13 @@ bool sys::getHostCPUFeatures(StringMap<bool> &Features) { Features["prefetchwt1"] = HasLeaf7 && ((ECX >> 0) & 1); Features["avx512vbmi"] = HasLeaf7 && ((ECX >> 1) & 1) && HasAVX512Save; + Features["pku"] = HasLeaf7 && ((ECX >> 4) & 1); Features["avx512vbmi2"] = HasLeaf7 && ((ECX >> 6) & 1) && HasAVX512Save; + Features["vaes"] = HasLeaf7 && ((ECX >> 9) & 1) && HasAVXSave; + Features["vpclmulqdq"] = HasLeaf7 && ((ECX >> 10) & 1) && HasAVXSave; + Features["avx512vnni"] = HasLeaf7 && ((ECX >> 11) & 1) && HasAVX512Save; + Features["avx512bitalg"] = HasLeaf7 && ((ECX >> 12) & 1) && HasAVX512Save; Features["avx512vpopcntdq"] = HasLeaf7 && ((ECX >> 14) & 1) && HasAVX512Save; - Features["pku"] = HasLeaf7 && ((ECX >> 4) & 1); - Features["vaes"] = HasLeaf7 && ((ECX >> 9) & 1) && HasAVXSave; - - // VPCLMULQDQ (carry-less multiplication quadword) - Features["vpclmulqdq"] = HasLeaf7 && ((ECX >> 10) & 1) && HasAVXSave; - - // Enable Vector Neural Network Instructions - Features["avx512vnni"] = HasLeaf7 && ((ECX >> 11) & 1) && HasAVX512Save; - - // Enable Bit Algorithms - Features["avx512bitalg"] = HasLeaf7 && ((ECX >> 12) & 1) && HasAVX512Save; bool HasLeafD = MaxLevel >= 0xd && !getX86CpuIDAndInfoEx(0xd, 0x1, &EAX, &EBX, &ECX, &EDX); |
