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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-03-21 20:56:05 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-03-21 20:56:05 +0000 |
commit | 9a1a1f7bb2f182e457595f1f207fa50d5e24283f (patch) | |
tree | fd8602fe7782cf1c3dc371511a29a1e51c2ece26 /llvm/lib | |
parent | d2565d2126f3d27ac9e987076707f255616cf5ce (diff) | |
download | bcm5719-llvm-9a1a1f7bb2f182e457595f1f207fa50d5e24283f.tar.gz bcm5719-llvm-9a1a1f7bb2f182e457595f1f207fa50d5e24283f.zip |
Mips: Don't create copy of nothing
This was creating a copy of the register the pseudo itself was
def'ing, leaving a copy of an undefined register. I'm not sure how
the verifier is not catching this, but this avoids asserting in a
future change to RegAllocFast
llvm-svn: 356716
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/Mips/MipsISelLowering.cpp | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index 95c0103bbc8..21c7cf2dd79 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -1750,12 +1750,10 @@ MipsTargetLowering::emitAtomicCmpSwap(MachineInstr &MI, // after fast register allocation, the spills will end up outside of the // blocks that their values are defined in, causing livein errors. - unsigned DestCopy = MRI.createVirtualRegister(MRI.getRegClass(Dest)); unsigned PtrCopy = MRI.createVirtualRegister(MRI.getRegClass(Ptr)); unsigned OldValCopy = MRI.createVirtualRegister(MRI.getRegClass(OldVal)); unsigned NewValCopy = MRI.createVirtualRegister(MRI.getRegClass(NewVal)); - BuildMI(*BB, II, DL, TII->get(Mips::COPY), DestCopy).addReg(Dest); BuildMI(*BB, II, DL, TII->get(Mips::COPY), PtrCopy).addReg(Ptr); BuildMI(*BB, II, DL, TII->get(Mips::COPY), OldValCopy).addReg(OldVal); BuildMI(*BB, II, DL, TII->get(Mips::COPY), NewValCopy).addReg(NewVal); |