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| author | Evandro Menezes <e.menezes@samsung.com> | 2019-11-12 14:13:30 -0600 |
|---|---|---|
| committer | Evandro Menezes <e.menezes@samsung.com> | 2019-11-12 14:37:28 -0600 |
| commit | 98856e3943de698f8c1d940c08bdbf50f04937b4 (patch) | |
| tree | 77d488cd2daa348e71cfe2a1cbefb231427fd1b7 /llvm/lib | |
| parent | 0aff3174dcc00516fd26c6554266b05a236166bb (diff) | |
| download | bcm5719-llvm-98856e3943de698f8c1d940c08bdbf50f04937b4.tar.gz bcm5719-llvm-98856e3943de698f8c1d940c08bdbf50f04937b4.zip | |
[AArch64] Fix addressing mode predicates
Fix predicates related to the register offset addressing mode.
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64SchedPredicates.td | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64SchedPredicates.td b/llvm/lib/Target/AArch64/AArch64SchedPredicates.td index e155652318a..028ad2232c9 100644 --- a/llvm/lib/Target/AArch64/AArch64SchedPredicates.td +++ b/llvm/lib/Target/AArch64/AArch64SchedPredicates.td @@ -41,7 +41,7 @@ let FunctionMapper = "AArch64_AM::getMemExtendType" in { // Check for scaling in the register offset addressing mode. let FunctionMapper = "AArch64_AM::getMemDoShift" in -def CheckMemScaled : CheckImmOperandSimple<3>; +def CheckMemScaled : CheckImmOperandSimple<4>; // Check the shifting type in arithmetic and logic instructions. let FunctionMapper = "AArch64_AM::getShiftType" in { @@ -319,7 +319,8 @@ def IsLoadRegOffsetOp : CheckOpcode<[PRFMroW, PRFMroX, LDRBroW, LDRBroX, LDRHroW, LDRHroX, LDRSroW, LDRSroX, - LDRDroW, LDRDroX]>; + LDRDroW, LDRDroX, + LDRQroW, LDRQroX]>; // Identify whether an instruction is a load // using the register offset addressing mode. @@ -330,7 +331,8 @@ def IsStoreRegOffsetOp : CheckOpcode<[STRBBroW, STRBBroX, STRBroW, STRBroX, STRHroW, STRHroX, STRSroW, STRSroX, - STRDroW, STRDroX]>; + STRDroW, STRDroX, + STRQroW, STRQroX]>; // Identify whether an instruction is a load or // store using the register offset addressing mode. |
