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| author | Craig Topper <craig.topper@intel.com> | 2017-12-30 06:45:46 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-12-30 06:45:46 +0000 |
| commit | 97cc7b037701057b8358953930e31a0f8e72288a (patch) | |
| tree | b294f95b8c30a66bb6e8a1d74e5af2087227b232 /llvm/lib | |
| parent | c5fd31a80212d3bbe491bd1f7fda275e1791c82b (diff) | |
| download | bcm5719-llvm-97cc7b037701057b8358953930e31a0f8e72288a.tar.gz bcm5719-llvm-97cc7b037701057b8358953930e31a0f8e72288a.zip | |
[X86] Remove isel patterns for kshifts with types that don't support kshift natively.
We should only be creating natively supported kshifts now.
llvm-svn: 321577
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrAVX512.td | 17 |
1 files changed, 0 insertions, 17 deletions
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td index 5b7b9baf003..ebf9bd7d8b0 100644 --- a/llvm/lib/Target/X86/X86InstrAVX512.td +++ b/llvm/lib/Target/X86/X86InstrAVX512.td @@ -3087,23 +3087,6 @@ defm : operation_subvector_mask_lowering<VK16, v16i1, VK64, v64i1>; defm : operation_subvector_mask_lowering<VK32, v32i1, VK64, v64i1>; -// Patterns for kmask shift -multiclass mask_shift_lowering<RegisterClass RC, ValueType VT> { - def : Pat<(VT (X86kshiftl RC:$src, (i8 imm:$imm))), - (VT (COPY_TO_REGCLASS - (KSHIFTLWri (COPY_TO_REGCLASS RC:$src, VK16), - (I8Imm $imm)), - RC))>; - def : Pat<(VT (X86kshiftr RC:$src, (i8 imm:$imm))), - (VT (COPY_TO_REGCLASS - (KSHIFTRWri (COPY_TO_REGCLASS RC:$src, VK16), - (I8Imm $imm)), - RC))>; -} - -defm : mask_shift_lowering<VK8, v8i1>, Requires<[HasAVX512, NoDQI]>; -defm : mask_shift_lowering<VK4, v4i1>, Requires<[HasAVX512]>; -defm : mask_shift_lowering<VK2, v2i1>, Requires<[HasAVX512]>; //===----------------------------------------------------------------------===// // AVX-512 - Aligned and unaligned load and store // |
