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authorAndrew Lenharth <andrewl@lenharth.org>2005-01-27 00:51:05 +0000
committerAndrew Lenharth <andrewl@lenharth.org>2005-01-27 00:51:05 +0000
commit9748b623a40fbb82402b29989c0c7edab68b6b2c (patch)
tree8853a01d658512f79ac2dc2d1908c785a2e4348e /llvm/lib
parent267908ad47bc094a24e6d55de849ee26c4d33d59 (diff)
downloadbcm5719-llvm-9748b623a40fbb82402b29989c0c7edab68b6b2c.tar.gz
bcm5719-llvm-9748b623a40fbb82402b29989c0c7edab68b6b2c.zip
minor bug fix
llvm-svn: 19849
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/Alpha/AlphaISelPattern.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaISelPattern.cpp b/llvm/lib/Target/Alpha/AlphaISelPattern.cpp
index befcc3ff1bd..3092a11a39b 100644
--- a/llvm/lib/Target/Alpha/AlphaISelPattern.cpp
+++ b/llvm/lib/Target/Alpha/AlphaISelPattern.cpp
@@ -157,7 +157,7 @@ AlphaTargetLowering::LowerArguments(Function &F, SelectionDAG &DAG)
case MVT::i32:
case MVT::i64:
BuildMI(&BB, Alpha::IDEF, 0, args_int[count - 1]);
- argVreg.push_back(MF.getSSARegMap()->createVirtualRegister(getRegClassFor(getValueType(I->getType()))));
+ argVreg.push_back(MF.getSSARegMap()->createVirtualRegister(getRegClassFor(MVT::i64))));
argPreg.push_back(args_int[count - 1]);
break;
}
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