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| author | Jim Grosbach <grosbach@apple.com> | 2010-10-29 23:21:03 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-10-29 23:21:03 +0000 |
| commit | 96d828448f899cf7e64e205c673c462711396bf2 (patch) | |
| tree | 0f128cff6489343dee6d22d032d319a7086dff68 /llvm/lib | |
| parent | e5c1bda4d177f2420d2e9b7fd725dd7e199a5bd0 (diff) | |
| download | bcm5719-llvm-96d828448f899cf7e64e205c673c462711396bf2.tar.gz bcm5719-llvm-96d828448f899cf7e64e205c673c462711396bf2.zip | |
trailing whitespace
llvm-svn: 117740
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp b/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp index ffe462f64e3..8693ec3fd1c 100644 --- a/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp +++ b/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp @@ -91,7 +91,7 @@ public: unsigned getImmMinusOneOpValue(const MCInst &MI, unsigned Op) const { return MI.getOperand(Op).getImm() - 1; } - + unsigned getNEONVcvtImm32OpValue(const MCInst &MI, unsigned Op) const { return 64 - MI.getOperand(Op).getImm(); } @@ -154,7 +154,7 @@ unsigned ARMMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO) const { if (MO.isReg()) { unsigned regno = getARMRegisterNumbering(MO.getReg()); - + // Q registers are encodes as 2x their register number. switch (MO.getReg()) { case ARM::Q0: case ARM::Q1: case ARM::Q2: case ARM::Q3: |
