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| author | Owen Anderson <resistor@mac.com> | 2011-08-18 22:47:44 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-08-18 22:47:44 +0000 |
| commit | 96b7ad2e1793a9690b9b7917e44e08874abe4aa9 (patch) | |
| tree | 42400b704c802baae5cec4b0484598830b0689fb /llvm/lib | |
| parent | 293683b6c413c05914267071a1d4feb61e2ce358 (diff) | |
| download | bcm5719-llvm-96b7ad2e1793a9690b9b7917e44e08874abe4aa9.tar.gz bcm5719-llvm-96b7ad2e1793a9690b9b7917e44e08874abe4aa9.zip | |
STC2L_POST and STC2L_POST should be handled the same as STCL_POST/LDC_POST for the purposes of decoding all operands except the predicate.
Found by randomized testing.
llvm-svn: 138003
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 40a7936cfe2..a57102c6e14 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -927,6 +927,8 @@ static DecodeStatus DecodeCopMemInstruction(llvm::MCInst &Inst, unsigned Insn, case ARM::STC2L_OPTION: case ARM::LDCL_POST: case ARM::STCL_POST: + case ARM::LDC2L_POST: + case ARM::STC2L_POST: break; default: Inst.addOperand(MCOperand::CreateReg(0)); @@ -946,6 +948,8 @@ static DecodeStatus DecodeCopMemInstruction(llvm::MCInst &Inst, unsigned Insn, switch (Inst.getOpcode()) { case ARM::LDCL_POST: case ARM::STCL_POST: + case ARM::LDC2L_POST: + case ARM::STC2L_POST: imm |= U << 8; case ARM::LDC_OPTION: case ARM::LDCL_OPTION: |
